Now days, low power and low energy have become an important issue in consumer electronics and it is necessary to do research in combinational circuits. One of the important elements in digital circuits is a multiplexer or data selector for processing multiple inputs with a single output. Presently, multiplexers have become a universal logic element used to design any digital combinational logic...

Abstract The multi-dimensional multiplexing technology is very promising for further increasing the link capacity of optical interconnects. A 96-channel silicon-based on-chip reconfigurable add-drop multiplexer (ROADM) proposed and demonstrated first time to satisfy demands in hybrid mode/polarization/wavelengthdivision-multiplexing systems. present ROADM consists a six-channel mode/polarizatio...

This paper presents the design and implementation of an Optical 4:1 Multiplexer using Sagnac Switches as Terahertz Asymmetric Demultiplexers (TOADs). multiplexers play a crucial role in modern communication systems by combining multiple signals onto single optical channel. The proposed multiplexer architecture leverages benefits Switches, such low insertion loss, high extinction ratio, crosstal...

This paper discusses global area optical transport ring networks using wavelength division multiplexing (WDM) technologies and proposes a novel optical add/drop multiplexer (OADM) architecture suitable for such an application field. Study on the requirements of a global area ring application elucidates the appropriate ring/ protection architecture as the path switched bi-directional ring. The p...

Based on Lindley’s recursive equations for G/G/1 systems, this paper proposes a Fast Discrete Event Simulation (FDES) model for queueing networks. Equations for multiplexer and de-multiplexer elements are presented, which allows to simulate not only tandem but queueing networks with an arbitrary topology. Time savings obtained with FDES could speed up the analyses of large-scale queueing networ...

This paper presents a new multiplexer based FPGA, which can operate at a clock frequency of 5–10 GHz. Redundant switches on the original signal paths are removed improving the performance. The configurable logic blocks (CLBs) power is greatly reduced by using a revised multiplexer structure and turning off unused cells dynamically. More routing capabilities are provided with more inputs/outputs...

The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other...

On-chip mode converters and multiplexers are fundamental components to scale the capacity of silicon optical interconnects by using different spatial modes waveguides. Recently, we proposed a low loss compact converter multiplexer consisting subwavelength-engineered multimode interference coupler, tapered waveguides as phase shifter symmetric Y-junction. However, narrow spectral response limite...