The multiplication is the basic arithmetic operation in any typical processor. The multiplication process requires more hardware resources and processing time when compared with addition and subtraction. The accuracy of a multiplication mostly relies on the precision of the multiplication; a variable precision multiplier will have more accuracy than single or double precision multipliers. In th...

Floating point arithmetic is widely used in many areas especially scientific computation and signal processing. The main objective of this paper is to reduce the power consumption and to increase the speed of execution and the implementation of floating point multiplier using sequential processing on the reconfigurable hardwareFloating Point (FP) addition, subtraction and multiplication are wid...

We present the formal verification of the floating-point multiplier in the Intel IA-32 Pentium 4 microprocessor. The verification is based on a combination of theoremproving and BDD based model-checking tasks performed in a unified hardware verification environment. The tasks are tightly integrated to accomplish complete verification of the multiplier hardware coupled with the rounder logic. Th...

This work was one of ASIC basis technology project mainly managed by IDEC and supported by the ministry of trade, industry & energy and the ministry of science and technology of korea. Abstract In the conventional oating point multipliers, the rounding stage is usually constructed by using a high speed adder for the increment operation, increasing the overall execution time and occupying a larg...

In recent times, DSP algorithms have received increased attention due to rapid advancements in multimedia computing and high-speed wired and wireless communications. In response to these advances, the search for novel implementations of arithmetic-intensive circuitry has intensified. For the portability requirement in telecommunication systems, there is a need for low power hardware implementat...

In the present paper, the Hyers-Ulam stability and also the superstability of double centralizers and multipliers on Banach algebras are established by using a fixed point method. With this method, the condition of without order on Banach algebras is no longer necessary.