Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design. The core of a microprocessor, which includes the largest power density on the microprocessor. In an effort to reduce the power con...

A circuit for generating reference voltages for an A D converter is presented. The circuit consisting of a bandgap reference and a driver circuit is capable of operating on sub 1-volt supply voltages. The circuit is designed using a standard 0.5 p m CMOS technology. Simulations show maximum 0.24% variation in the generated reference voltage over a temperature range from -20 "C to I00"C and a su...

Aggressive voltage scaling to 1 V and below through technology, circuit, and architecture optimization is the key to low-power design. Threshold voltage scaling enables aggressive supply scaling but increases leakage power. Technology and circuit trends to control idle leakage power are presented including MTCMOS, variable VT bulk-CMOS, and variable VT Sol . Power can also be reduced by adaptiv...

An adiabatic logic is a technique to design low power digital VLSI’s. This paper describes the design and VLSI implementation of a multiplier using a two phase drive adiabatic dynamic CMOS logic (2PADCL) circuit. Circuit operation and performance have been evaluated using a 4×4-bit 2PADCL multiplier fabricated in a 1.2 μm CMOS process. The experimental results show that the multiplier was opera...

A new current-source control technique is proposed to design a low-power high-speed multiplevalued current-mode (MVCM) integrated circuit in a low supply voltage. The use of a di erential logic circuit (DLC) with a pair of dual-rail inputs makes the input voltage swing small, which results in a high driving capability at a lower supply voltage, while having large static power dissipation. In th...

New low-power Level Shifter (LS) circuit is designed by using sleep transistor with Multi Threshold CMOS (MTCMOS) technique for robust logic voltage shifting from sub-threshold to abovethreshold domain. MultiSupply Voltage Design (MSVD) technique is mainly used for energy and speed in modern system-on-chip. In MSVD, level shifters are required to allow different voltage supply to shift from the...

This paper presents techniques to assist the power supply designer in accurately modeling and designing the control loop of a switchmode DC/DC power supply. The three major components of the power supply control loop (i.e., the power stage, the pulse width modulator and the error amplifier) are presented with power stage modeling being the focus of this presentation. The power stage is modeled ...

The paper presents the design and implementation of LVDS (low-voltage differential signaling) receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and the comparator with internal hysteresis. The receiver supports 3.5 Gbps data rate with 7.4 mA current at 1.8 V supply according to post-layout circuit simulations. The circuit has the...

Abstract A new high-speed and low-power threshold detector is proposed to realize high-performance arithmetic VLSI systems. In a conventional threshold detector with a single supply voltage, the input signal swing of a differential-pair circuit (DPC) is too large, which causes large power dissipation together with a long switching delay. The use of two kinds of supply voltages makes the input s...