Modeling and simulation of digital hardware at the behavioral level enable designers to experiment with a system without specifying implementation details. Verilog is a language that supports modeling and simulation at di erent levels of abstraction. However, all components in the same design must conform to a certain timing model, which may not be natural for all components. Ptolemy is a simul...

The Ptolemy project studies modeling, simulation, and design of concurrent, real-time, embedded systems. The focus is on assembly of concurrent components. The key underlying principle in the project is the use of well-defined models of computation that govern the interaction between components. The software system Ptolemy II has been in public release for about nine months now, and includes a ...

A model of computation (MoC) is a formal abstraction of execution in a computer. There is a need for composing MoCs in e-science. Kepler, which is based on Ptolemy II, is a scientific workflow environment that allows for MoC composition. This paper explains how MoCs are combined in Kepler and Ptolemy II and analyzes which combinations of MoCs are currently possible and useful. It demonstrates t...

It is becoming increasingly popular to describe real time signal proessing systems targetted for FPGA or ASIC implementation using structural signal flow graphs. We have implemented support for generation of synthesizeable as well as testbench VHDL code from Ptolemy II models. A helper based approach borrowing heavily from the existing Ptolemy II C code generation framework is used. This work d...

TinyOS is a component-based operating system designed for wireless embedded sensor networks. TOSSIM provides discrete event simulation of homogeneous TinyOS programs at the interrupt level. This paper presents PtinyOS, an integrated development environment built in Ptolemy II for developing and simulating heterogeneous TinyOS programs. PtinyOS will allow application developers to easily transit...

This is a chapter from the book System Design, Modeling, and Simulation using Ptolemy II This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 Unported License. To view a copy of this license, visit: http://creativecommons.org/licenses/by-sa/3.0/, or send a letter to Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, 94041, USA. Permissions beyond t...

Integer-Controlled Dataflow (IDF) and its code generation applications in Ptolemy are presented. In IDF graphs, which specify data processing systems, data token flow is controlled by integer control tokens and states of actors at run-time. The firing order of actors (schedule) is determined at compile-time, however, the actors are conditionally activated at run-time. This static schedule contr...