نتایج جستجو برای: reconfigurable instruction set processor
تعداد نتایج: 740389 فیلتر نتایج به سال:
The need to execute highly demanding and real-time applications on ambient computing networks will be a big challenge in the future. In this paper we present an Operating Environment (OE) that allows application partitioning on such platforms. The OE decisions are made based on a trade negotiation protocol and energy efficiency and resource matching metrics. The metrics matches application and ...
A computer is a system which processes data according to a specified algorithm. It contains one or more programmable (in the sense that the user can specify its operation) digital processors, also called central processing units (CPUs), memory for storing data and instructions, and input and output devices1. The science which researches the design of those systems is called computer architectur...
With this scheme, a simple processor might take 4 cycles per instruction (CPI = 4). processors, such as IBM's 801 research prototype, the MIPS R2000 (based on to pipeline a RISC because its reduced instruction set means the instructions This simple (and fun) classification of design styles first appeared in a 1993. The two processor classifications are the Reduced Instruction Set Computer The p...
I n this dissertation, we present a new approach in embedded processor design that entails the augmentation of a programmable processor with reconfigurable hardware. To this end, we re-introduce and extend traditional microcode concepts to emulate the configuration process of the augmented reconfigurable hardware in addition to the emulation of the execution process on both fixed and reconfigur...
Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is often an important requirement in pervasive applications. However, it has been the hardest to implement on constraint platforms due to its very high computational requirements. This contribution describes a proof-of-...
Heterogeneous reconfigurable systems provide drastically higher performance and lower power consumption than traditional CPU-centric systems. Moreover, they do it at much lower costs and shorter times to market than non-reconfigurable hardware solutions. They also provide the flexibility that is often required for the engineering of modern robust and adaptive systems. Due to their heterogeneity...
Speedups from mapping four real-life DSP applications on an embedded system-on-chip that couples coarsegrained reconfigurable logic with an instruction-set processor are presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elements. A design flow for improving application’s performance is proposed. Critical software parts, called kernels, are accelerated on the...
The efficient processing of MultiMedia Applications (MMAs) is currently one of the main bottlenecks in the media processing field. Many architectures have been proposed for processing MMAs such as VLIW, superscalar (general-purpose processor enhanced with a multimedia extension such as MMX), vector architectures, SIMD architectures, and reconfigurable computing devices. The question then arises...
Energy becomes a dominating factor for a wide spectrum of computations: from intensive data processing in “big data” companies resulting in large electricity bills, to infrastructure monitoring with wireless sensors relying on energy harvesting. In this context it is essential for a computation system to be adaptable to the power supply and the service demand, which often vary dramatically duri...
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