Providing an accurate reference signal for such calibration work is not always easy. The output characteristics of a signal generator are difficult to measure and the cable, or network, used to connect the device under test to a generator will also affect the power level seen at the device. If these effects cannot be accounted for properly, the accuracy of the reference level will be limited.

A 30 MHz, 30 mW, 0.3 mm2 DDS clock generator circuit with time domain interpolation and -50 dBc spurious signal level has been designed. The sine look-up-table and D/A converter of the conventional DDS have, been replaced by a three-step digitally programmable delay generator with 130 ps resolution. This increases the effective sampling frequency to 7.68 GHz, and that's why no reconstruction fi...