h THREE-DIMENSIONAL INTEGRATION, a breakthrough technology to achieve “More Moore and More Than Moore,” provides numerous benefits such as better performance, lower power consumption, smaller form factor, and wider bandwidth than traditional 2-D integration technology. Three-dimensional stacking of heterogeneous silicon layers also enables heterogeneous 3-D integration. Thanks to the enormous e...

This paper is a brief survey on hw/sw codesign, its present features and its possible future developments. It is beyond the scope of this article to give a full explanation of all the steps that lead to a complete design. We will, instead, focus our attention on that set of evaluation criteria used to estimate the eeciency of a design in terms of time to market, cost, power consumption, area oc...

Charge collection measurements performed on heavily irradiated p-spray dofz pixel sensors with a grazing angle hadron beam provide a sensitive determination of the electric field within the detectors. The data are compared with a complete charge transport simulation of the sensor which includes signal trapping and charge induction effects. A linearly varying electric field based upon the standa...

In this work we propose the application of an enhanced radiation damage model based on the introduction of deep level traps / recombination centers suitable for device level numerical simulation of silicon detectors at very high fluences (e.g. 2.0 × 1016 1 MeV equivalent neutrons/cm2). We present the comparison between simulation results and experimental data for p-type substrate structures in ...

Impact ionization in fully depleted (FD) Silicon On Insulator (SOI) n-Channel MOSFET is investigated as a function of the doping concentration. We have found that impact ionization increases with the decrease in the doping concentration and vice versa. Simulation results obtained from Sentaurus TCAD with the higher doping concentration can control the threshold voltage (Vth). Furthermore we hav...

In this paper, we present a comprehensive TCAD methodology for analyzing the effects of process variation on circuit functionality. We will highlight two essential features of this methodology. First, we will describe the statistical approach we have adopted for worst case file (WCF) analysis in the presence of on-chip variation (OCV). Secondly, we will summarize some key new TCAD statistical m...

It is shown by TCAD simulations how the gate-induced drain leakage which dominates the OFF-current in 22nm double-gate SOI nFETs with high-K gate stacks, can be minimized by proper variations of the junction profiles. Based on a microscopic, non-local model of band-to-band tunneling, transfer characteristics are computed after systematic changes in source/drain doping, body thickness, and HfO2 ...

Transparent electronics becomes one of the most advanced topics for wide range of device applications. The key components are wide band gap semiconductors, where oxides of different origins play an important role as passive component and also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during ...