The expectative sub-graph isomorphism of uncertain attribute graph is based on the analysis of complex network structure and the characteristic of uncertain attribute graph. The expectative sub-graph isomorphism of uncertain attribute graph is only one threshold value as constraint conditions. The method is simple, but the computation is large amount. Therefore, this paper brings in the definit...

A detailed three-dimensional (3-D) statistical “atomistic” simulation study of fluctuation-resistant sub-0.1m MOSFET architectures with epitaxial channels and delta doping is presented. The need for enhancing the fluctuation resistance of the sub-0.1m generation transistors is highlighted by presenting summarized results from atomistic simulations of a wide range of conventional devices with un...

Scaling the voltage to the sub-threshold region is a convincing technique to achieve low power in digital circuits. The problem is that process variability severely impacts the performance of circuits operating in the sub-threshold domain. In this paper, we evaluate the sub-threshold sizing methodology of [1,2] on 40 nm and 90 nm standard cell libraries. The concept of the proposed sizing metho...

BACKGROUND Late-life sub-threshold depressive symptoms (i.e. depressive symptoms that do not meet the criteria for a diagnosis of major depressive disorder) are associated with impaired physical health and function, and increased risk of major depressive disorder. Magnetic resonance imaging (MRI) studies examining late-life major depressive disorder find structural brain changes in grey and whi...

We study asymptotic behavior of global positive solutions of the Cauchy problem for the semilinear parabolic equation ut = ∆u + up in RN , where p > 1 + 2/N , p(N − 2) ≤ N + 2. The initial data are of the form u(x, 0) = αφ(x), where φ is a fixed function with suitable decay at |x| = ∞ and α > 0 is a parameter. There exists a threshold parameter α∗ such that the solution exists globally if and o...

In this paper, a dual supply level shifter is designed for robust voltage shifting from sub threshold to above threshold domain using high voltage CMOS technique. High voltage CMOS is an effective circuit level technique that improves the performance and design by utilizing high threshold voltage. In this minimum input voltage attainable while maintaining robust operation is found to be around ...

The scaling down of technology in CMOS circuits, results in the down scaling of threshold voltage thereby increasing the sub-threshold leakage current. LECTOR is a technique for designing CMOS circuits in order to reduce the leakage current without affecting the dynamic power dissipation, which made LECTOR a better technique in leakage power reduction when compared to all other existing leakage...

In this paper, a dual supply level shifter is designed for robust voltage shifting from sub threshold to above threshold domain using high voltage CMOS technique. High voltage CMOS is an effective circuit level technique that improves the performance and design by utilizing high threshold voltage. In this minimum input voltage attainable while maintaining robust operation is found to be around ...

This manuscript presents the digital hardware realization of a wavelet based event detector for cardiac pacemaker applications. The architecture of the detector is partially folded to minimize hardware cost. An energy model is applied to evaluate the energy efficiency in the sub-threshold (sub-VT ) domain. The design is synthesized in 65 nm low leakage-high threshold CMOS technology, and it is ...