We describe the application of model-based diagnosis to the debugging of VHDL programs. In our previous work in VHDL-based software diagnosis, we have relied upon a very abstract representation to make it possible to diagnose fullsized applications (up to 1MLOC) at the cost of reduced discrimination between diagnoses. This paper describes a more detailed representation for VHDL programs that ex...

The paper describes a VHDL based hierarchical test generator for digital systems. A VHDL subset to be used as an input of the test generation system is defined. The VHDL description will be transformed into a set of decision diagrams, which is used as a diagnostic model of a system under test. Functional test generation as well as hierarchical test synthesis are supported by the model. Experime...

encountered in ASIC (applicationspecific integrated circuit) developments originate from unclear or incorrectly implemented specifications. To allow independent evaluation of a device’s functionality, the European Space Agency (ESA) normally requests a VHDL model before a company starts the detailed design. This allows ESA or another company to verify the functionality. (For more about ESA and ...

This paper presents a formal model of several fundamental concepts in VHDL including the semantics of individual concurrent statements, and groups of those statements, resolution functions, delta delays, and hierarchical component structuring. Based on this model, several extensions to VHDL are proposed, including nondeterministic assignments and unbounded asynchrony. Nondeterminism allows the ...

Relating to a previous simplified VHDL processor model [1], a more advanced synthesized VHDL pipeline microprocessor model was developed and has been used in the second term computer architecture course offered in the School of Electrical and Computer Engineering at the Georgia Institute of Techonology. This paper will first describe the pipeline processor model and its VHDL implementation. The...

Fault injection provides a method of assessing the dependability of a system under test. Traditionally fault injection is employed near the end of the design process after hardware and software prototypes have been developed. In order to eliminate costly re-designs near the end of the design process, a methodology for performing fault injection throughout the design process is described in this...

The introduction of HDLs (hardware description languages) have made a significant contribution to VLSI circuit design. While these languages are well suited to describe circuits in great detail, they are found wanting when attempting formal verification of circuits. One of the drawbacks lies in the lack of formal models of semantics. VHDL, with a wide variety of tools available to carry out cir...

Ultracentrifugally isolated high density lipoprotein (HDL) particles of d greater than 1.125 g/ml promote net transport of cholesterol from cultured cells. Consequently, when cultured human fibroblasts and arterial smooth muscle cells were incubated with HDL3 (d = 1.125-1.21 g/ml) and "very high" density lipoprotein (VHDL, d = 1.21-1.25 g/ml), low density lipoprotein (LDL) receptor activity was...

.............................................................................................................................. I TABLE OF CONTENTS............................................................................................................ I LIST OF FIGURES................................................................................................................. IV LIST OF ...