Low product life cycle, high non-recurring expenses and increasing development costs is forcing product makers to design more and more complex chips. Today's product market demands hardware with high performance, higher functionality, smaller form factor and lower power consution. This has led to adoption of rapidly changing technologies such as systems-on-chip with multiple core architectures,...

In modern very large scale integrated (VLSI) digital systems, power consumption has become a critical concern of VLSI designers. As size shrinks and density increases in chips, it will be challenge to design high performance low-power systems. Therefore, designers are trying reduce dissipation these systems by using optimization techniques. Different mathematical operations can found the archit...

Hierarchical convolutional neural networks are a well-known robust image-recognition model. In order to apply this model to robot vision or various intelligent vision systems, its VLSI implementation with high performance and low power consumption is required. This paper proposes a convolutional network VLSI architecture using a hybrid approach composed of pulse-width modulation (PWM) and digit...

This study introduces a reversible optical fulladder. Also optical NOT and NOR gates are implemented through Electro-Absorption-Modulator / Photo Detector (EAM/PD) pairs, were utilized for fulfilling reversible R gate. Then, reversible fulladder was designed based on the proposed reversible optical R gate. The operation of the suggested fulladder was simulated using Optispice and it was fou...

This study introduces a reversible optical fulladder. Also optical NOT and NOR gates are implemented through Electro-Absorption-Modulator / Photo Detector (EAM/PD) pairs, were utilized for fulfilling reversible R gate. Then, reversible fulladder was designed based on the proposed reversible optical R gate. The operation of the suggested fulladder was simulated using Optispice and it was fou...

---------------------------------------------------------------------***--------------------------------------------------------------------Abstract Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-ha...