A substrate-triggered technique is proposed to improve ESD protection efficiency of the stacked-NMOS device in the mixed-voltage I/O circuit. The substrate-triggered technique can further lower the trigger voltage of the stacked-NMOS device to ensure effective ESD protection for the mixed-voltage I/O circuit. The proposed ESD protection circuit with the substrate-triggered technique for 2.5V/3....

This paper proposes a low voltage CMOS nano-ampere current reference circuit and presents its performance with circuit simulations in 180-nm technology. The proposed circuit consists of biasvoltage, current-source and offset-voltage sub-circuits with most of MOSFETs operating in subthreshold region. Simulation results show that the circuit generates a stable reference current of 110-nA in suppl...

Electrical Engineering (ABSTRACT) The conventional power factor correction circuit has a fixed output voltage. However, in some applications, a PFC circuit with a wide output voltage range is needed. A single phase power factor correction circuit with wide output voltage range is developed in this work. After a comparison of two main power stage candidates (Buck+Boost and Sepic) in terms of eff...

A conventional high power DC power supply systems consist of a three-phase diode rectifier followed by a high frequency converter to supply loads at regulated DC voltage. These rectifiers draw significant harmonic currents from the utility, resulting in poor input power factor. In this paper, a DC power supply based on dual-bridge matrix converter (DBMC) with reduced number of switches is p...

a log-domain current-mode true rms-to-dc converter based on a novel synthesis of a simplified current-mode low pass filter and a two-quadrant squarer/divider is presented. the circuit employs floating gate mos (fg-mos) transistors operating in weak inversion region. the converter features low power(<1.5uw), low supply voltage (0.9v), two quadrant input current, immunity from body effect, low ci...

The operating principle of pipelined analog-to-digital converter (ADC) is to subtract, sequentially along the cascaded stages, different reference voltages from the analog sample. This operation, nevertheless, creates internally an input-dependent fluctuation on the reference voltage. Such kind of signal-dependent error cannot be eliminated by trimming and/or calibration. The effect is especial...

This work presents the design of CMOS Combined Reference Circuit with Supply and Temperature compensation using 0.18 μm UMC technology. It consists of a start-up circuit, a current generator, and a voltage generator. Many current reference and voltage reference circuits have been reported. The references are used individually for generating fixed value of current or voltage for the particular u...