We consider the implementation of 16-bit floating point instructions on a Pentium 4 and a PowerPC G5 for image and media processing. By measuring the execution time of benchmarks with these new simulated instructions, we show that significant speed-ups are obtained compared to 32-bit FP versions. For image processing, the speed-up both comes from doubling the number of operations per SIMD instr...

Adders are one of the widely used digital components in digital integrated circuit design. The Carry Select Adder (CSA) provides a good compromise between cost and performance in carry propagation adder design. However, conventional CSA is still area-consuming due to the dual ripple carry adder (RCA) structure. In this paper, modification is done at gate-level to reduce area and power consumpti...

RC4 was designed in 1987 when 8-bit and 16-bit processors were commercially available. Today, most processors use 32-bit or 64bit words but using original RC4 with 32/64 bits is infeasible due to the large memory constraints and the number of operations in the key scheduling algorithm. In this paper we propose a new 32/64-bit RC4like keystream generator. The proposed generator produces 32 or 64...

This paper presents NORX8 and NORX16, the 8-bit and 16-bit versions of the authenticated cipher NORX, one of the CAESAR candidates. These new versions are better suited for low-end systems—such as “internet of things” devices—than the original 32-bit and 64-bit versions: whereas 32-bit NORX requires 64 bytes of RAM or cache memory, NORX8 and NORX16 require just 16 and 32 bytes, respectively. Bo...

In this paper the most significant aspect of the proposed method is that, the developed multiplier architecture is based on vertical and crosswise structure of Ancient Indian Vedic Mathematics. As per this proposed architecture, for two 32-bit numbers; the multiplier and multiplicand, each are grouped as 16-bit numbers so that it decomposes into 16×16 multiplication modules. It is also illustra...

Fraction (10 bits) Sign (1 bit) Exponent (5 bits) 16-bit floating-point format defined in IEEE 754-2008 standard Storage support on most of the modern CPUs and GPUs Native computation support especially on mobile platforms (Up coming nVidia Pascal desktop GPUs are announced to have native computation support) Pros: Smaller cache footprint (compared to "regular" 32-bit floats) More energy effici...

a Katholieke Universiteit Leuven, Department of Chemistry, Celestijnenlaan 200 D, B-3001, Leuven, Belgium. E-mail: [email protected]; Fax: (32) 16 32 79 82; Tel: (32) 16 32 75 26 b Universität Leipzig, Interdisciplinary Centre for Bioinformatics, Kreuzstr. 7b, D-04103, Leipzig, Germany c Universität Leipzig, Institute of Experimental Physics I, Linnéstr. 5, D-04103 Leipzig, Germany

In this paper, we have presented a systematic technique to improve throughput of signal/image processing algorithms when implemented on flexible precision hardware. Many image/signal processing algorithms need 8-16 bit precision while the DSPs available are of much higher precision (32bit). Significant performance gain can be obtained if multiple low precision computations can be performed in o...