نتایج جستجو برای: all digital phase locked loop
تعداد نتایج: 2730969 فیلتر نتایج به سال:
We calculate the decay width for the process H+ → h0W+ up to order g4 in the framework of the Two Higgs Doublet Model. We argue that for some reasonable choice of the free parameters the contribution from the one-loop graphs can be as large as 80%.
A 4 GHz PLL (phase-locked loop)-type frequency synthesizer has been implemented in the standard 0.18μm mixed-signal and RF 1P6M CMOS technology. It integrates a VCO, a dual-modulus prescaler, PFD, a charge pump, a control logic, various digital counters and digital registers onto a single chip. With the help of the linear model of the loop, the design and optimization of the loop parameters are...
An all-digital phase-locked loop (ADPLL) for high-speed clock generation is presented in this brief. The proposed ADPLL architecture uses both a digital control mechanism and a ring oscillator and, hence, can be implemented with standard cells. The ADPLL implemented in a 0.3m one-poly-four-metal CMOS process can operate from 45 to 510 MHz and achieve worst case frequency acquisition in 46 refer...
Design of a fast-locking phase-locked loop (PLL) is one of the major challenges in today’s wireless communications. A recently reported digitally controlled oscillator (DCO)-based all-digital PLL (ADPLL) can achieve an ultrashort settling time of 10 ms. This study describes a new DCO tuning word (OTW) presetting technique for the ADPLL to further reduce its settling time. Estimating the require...
The control system of a doubly-fed adjustable-speed pumped-storage hydropower plant needs phase-locked loops (PLLs) to obtain the phase angle of grid voltage. The main drawback of a comb-filter-based phase-locked loop (CF-PLL) is the slow dynamic response. This paper presents a modified comb-filter-based phase-locked loop (MCF-PLL) by improving the pole-zero pattern of the comb filter, and give...
The first phase of the ISAC II project consists of the acceleration of radioactive ions by 20 superconducting DTL's with a total effective voltage of ~20MV. Each of these cavities will be powered at a frequency of 106.08 MHz to a maximum field gradient of 6 MV/m. With unloaded cavity Q's of ~10, the RF control system for these superconducting cavities is based on a self-excited feedback loop. T...
نمودار تعداد نتایج جستجو در هر سال
با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید