Tiles are rewrite rules with side e ects, reminiscent of both Plotkin SOS and Meseguer rewriting logic rules. They are well suited for modeling coordination languages, since they can be composed both statically and dynamically via possibly complex synchronization and workow mechanisms. In this paper, we give a tile-based bisimilarity semantics for the asynchronous -calculus of Honda and Tokoro ...

For high performance designs, dynamic logic techniques have to be considered due to the promising high reachable frequencies. Such a technique is the True Single Phase Clock (TSPC) logic that allows designing circuits with standard cells and high speed potential. However, the disadvantages are a difficult clock tree design and high power consumption. Asynchronous logic has the potential to solv...

The well-known algorithm of Zielonka describes how to transform automatically a sequential automaton into a deterministic asynchronous trace automaton. In this paper, we improve the construction of deterministic asynchronous automata from finite state automaton. Our construction improves the well-known construction in that the size of the asynchronous automaton is simply exponential in both the...

The implementation of a low power logic based asynchronous circuit with the help of power gated logic. In asynchronous power gated logic (APL) circuit, each pipeline stage was incorporated with efficient charge recovery logic (ECRL) gate; handshake controller and partial charge reuse (PCR) mechanism. The main objective was, to provide a new lower power solutions using power gating (PG) for very...

dynamic techniques Sam S. Appleton, Shannon V. Morton, & Michael J. Liebelt Internal Report : HPCA-ECS-96/04 version I, June 17, 1997 Abstract|We explore the potential for extremely high asynchronous logic performance in CMOS and GaAs dynamic logic structures. By using a new class of GaAs dynamic logic, Pseudo-Dynamic Latched Logic, we develop asynchronous control structures capable of high-spe...