This paper presents the comparison between CMOS dynamic latch comparators. The circuit has been simulated using SPICE tool with 0.35μm technology, supply voltage of 3 V and 3.3 V respectively. The circuits studied and simulated in this paper are Preamplifier dynamic latch circuit that consists of a preamplifier followed by a double regenerative dynamic latch and the Buffered dynamic latch circu...

Power saving is more important than any other thing now a days because high speed and low power design continues to get more attention. In this paper, low power dynamic circuit [1] has been implemented at 180nm, 90nm, 45nm and 32nm technology, using HSPICE. The simulations are performed on CosmosScope. The power saved is up to 46%, 50%, 51% and 73% for 180nm, 90nm, 45nm and 32nm technology resp...

A new source follower circuit using low-temperature polycrystalline silicon thin film transistors (LTPS-TFTs) as analog buffer for the integrated data driver circuit of active matrix liquid crystal displays (AMLCDs) and active matrix light emitting diodes (AMOLEDs) is proposed and measured. Threshold voltage compensation circuit with two n-type thin film transistors, a capacitor, and four switc...

Plasmonics can improve the performance of polymer solar cells (PSCs) by localizing and concentrating light, and the location of the plasmonic metallic nanostructure in devices plays an important role in how to design high-performance plasmonic solar cells. Here, by varying the location of silver nanowires (Ag NWs) within the device architecture (at the interface between indium–tin–oxide and cat...

-A novel high and low speed output buffer circuit is proposed for Universal Serial Bus (USB) interface applications. Operation principles of this novel buffer are developed based on slew rate control and delayed turn-on technique. The mechanism for slew rate control is process variation self compensating. So, both precise rise and fall times of the output signal have been obtained for low speed...

In this paper, we reported that ZnO nanoparticles (NPs) film modified with C60 pyrrolidine tris-acid ethyl ester (PyC60) was used as cathode buffer layer in inverted polymer solar cells. The resultant device with a blend of PTB7:PC71BM as photoactive materials exhibited an open-circuit voltage (Voc) of 0.753 V, a short-circuit current (Jsc) of 16.04 mA cm , a fill factor (FF) of 72.5%, and an o...

This article represents the baseline data of the several semiconductor materials used in the model of a CIGS thin film solar cell with an inclusion of ZnS buffer layer. As well, input parameters, contact layer data and operating conditions for CIGS solar cell simulation with ZnS buffer layer have been described. The schematic diagram of photovoltaic solar cell has been depicted. Moreover, the m...

A large dynamic-range Variable Gain Amplifier (VGA) suitable for Ultra Wide Band (UWB) applications is presented. The VGA is composed of three programmable variable gain amplifier stages followed by an output buffer. Such wide bandwidth allows our proposed VGA to be used in multi-standard protocols. Power reduction is developed for the variable gain amplifier stages. Thorough analyses of the mi...

This paper presents a universal field programmable gate array (FPGA) programmable routing circuit, focusing primarily on a delay optimization. Under the precondition of the routing resource’s flexibility and routability, the number of programmable interconnect points (PIP) is reduced, and a multiplexer (MUX) plus a BUFFER structure is adopted as the programmable switch. Also, the method of offs...