Performance gains in memory have traditionally been obtained by increasing memory bus widths and speeds. The diminishing returns of such techniques have led to the proposal of an alternate architecture, the Fully-Buffered DIMM. This new standard replaces the conventional memory bus with a narrow, high-speed interface between the memory controller and the DIMMs. This paper examines how tradition...

Research in bus and driver scheduling at Leeds University has been taking advantage of new technologies since the early 1960s, with the objective of yielding better schedules more quickly. Here recent SERC supported work is presented. Most bus scheduling systems produce schedules for only one operating scenario. In practice, planning and scheduling are interconnected, and operators have to expl...

This paper presents an integer linear programming (ILP) model for the scheduling problem in high level synthesis. In addition to time-constrained scheduling and resource-constrained scheduling, a new scheduling problem called feasible scheduling is constructed, which provides a paradigm for exploring the solution space. Extensive consideration is given to the following applications: scheduling ...

The uniform-traac capacity of switchless, non-bus-oriented, ber-optic single-hop intercon-nections among N stations, each equipped with a small number of transmitters and receivers, can be as high as (log 2 N) concurrent transmissions on a single wavelength with round-robin scheduling in a time-slotted system. However, their capacity with the Slotted ALOHA access scheme does not increase with N...

In this paper, we propose a fault-tolerant scheduling real-time embedded system. This scheduling algorithm is dedicated to multi-bus heterogeneous architectures, which take as input a given system description and a given fault hypothesis. It is based on a data fragmentation and passive redundancy, which allow fast fault detection/retransmission and efficient use of buses. This scheduling approa...

SymTA/S is a system-level performance and timing analysis approach based on formal scheduling analysis techniques and symbolic simulation. The tool supports heterogeneous architectures, complex task dependencies and context aware analysis. It determines system-level performance data such as end-to-end latencies, bus and processor utilization, and worst-case scheduling scenarios. SymTA/S further...

We present an approach for designing and deploying real-time applications onto shared-bus multicore platforms with cache coherency. We model an application as a directed acyclic graph, and partition it into scheduling intervals. These are then mapped onto multiple cores and scheduled for parallel execution with the objective to reduce the worst-case response time of the application. To accompli...

Regional bus scheduling is necessary to urban public transport that is complicated by the necessity of assigning trips that belong to several routes to buses located at different depots while reducing fleet size and operating costs. Considering the reality of emergencies that may interfere with the ability of vehicles to complete trips on time, it is reasonable to use fuzzy numbers to express u...

In this paper, a crew-scheduling problem has been formulated considering the daily assignment of a set of crew staff to their round-trips for all the public transports (e.g. train, bus or air bus) that will minimize the waiting times and total service times (including waiting times) of all crews separately. In this approach, the waiting times as well as the service times of crews have been take...