FPGA can solve the lack of custom circuit, and overcome the original programmable gate device limited number of faults. The paper presents application of FPGA in high-speed CMOS digital image acquisition and color recognition system. Color recognition system is mainly composed of analog and digital two parts. The analog part mainly used photoelectric signal conversion, amplification and filteri...

Unfortunately there are some problems in deIn this paper, we present a n e f i c i e n t and accurate’ IDDQ faul t modeling technique f o r digital CMOS circuit. Both, the normal and faul ty “current” behaviors of a CMOS digital circuit can be described by th i s model. Also the parasit ic capacitive and induct ive parameters can be emulaled. A f o r m a l method f o r creating this model f r o...

Emerging non-volatile memory (NVM), or memristive, devices promise energy-efficient realization of deep learning, when efficiently integrated with mixed-signal integrated circuits on a CMOS substrate. Even though several algorithmic challenges need to be addressed to turn the vision of memristive Neuromorphic Systems-on-a-Chip (NeuSoCs) into reality, issues at the device and circuit interface n...

This paper presents the integrated circuit design of an ultra-wideband (UWB) transceiver for a wireless endoscope that enables real-time diagnosis with high resolution images. The implemented UWB transceiver is a non-coherent transmit reference (TR) architecture with differential binary phase shift Keying (DBPSK) modulation. All-digital pulse generator (PG) and merged radio frequency (RF) front...

The design of Multiple Valued Logic (MVL) digital circuits is performed by increasing the representation domain from the two level (N=2) switching algebra to N > 2 levels. Universal sets of MVL CMOS gates allow the synthesis and implementation of any MVL digital circuit. This paper proceed with: 1) the design and implementation of a universal set of IC gates, CMOS 0.25 um technology, that carry...

We present a system for direct parallel optical data communication between integrated circuits on neighboured printed circuit boards based on a monolithic integrated CMOS smart pixel array, fibre arrays, and VCSELs. The advantage of our system versus backplane systems is the direct data transfer through the space avoiding planar and area consuming interconnections. The detector chip allows a da...

The objective of this research is to develop built-in testing (BIT) techniques for the functional verification of analog and RF circuits and systems. The aim is to avoid the use of external analog instrumentation so that the cost of testing is reduced. The major challenges addressed by this work are: (1) To develop techniques for the on-chip test of integrated RF and analog circuits through a f...

This paper presents a wearable electrophysiological interface with enhanced immunity to motion artifacts. Anti-artifact schemes, including a patch-type modular structure and real-time automatic level adjustment, are proposed and verified in two wireless system prototypes of a patch-type electrocardiogram (ECG) module and an electromyogram (EMG)-based robot-hand controller. Their common ExG read...

As great advancements have been made in CMOS process technology over the past 20 years, RF CMOS circuits operating in the microwave band have rapidly developed from component circuit levels to multiband/multimode transceiver levels. In the next ten years, it is highly likely that the following devices will be realized: (i) versatile transceivers such as those used in software-defined radios (SD...

This paper introduces a high-speed high resolution CMOS current comparator which is used in an algorithmic Analog-to-Digital Converter (ADC) and implemented with a 0.6 μm standard CMOS process. Circuit occupies 170 x 80μm2. Proposed circuit performs comparison over a precision of 10bit at a 100MHz clock within the 0-250 μA input current range. Power consumption is less than 500 μA.