Millimeter-wave communication uses a frequency of at least 30GHz, which is higher than that commonly used for wireless local-area networks (LANs) and cellular phones. Millimeter waves have been used for business communications and radar in luxury cars; however, their use has not yet spread to the general public. In recent years, an increasing amount of research results on millimeter-wave comple...

An analogue adaptive filter for dynamic response compensation of a load cell sensor is presented. The filter employs only transistors and therefore it can be integrated using standard digital CMOS technology, which is suitable for System-on-Chip applications. To perform adaptive compensation over a wide range of measurand, a novel CMOS multiplier circuit was developed. The analogue adaptive fil...

A newly developed optical method for noninvasively measuring the switching activity of operating CMOS integrated circuit chips is described. The method, denoted as picosecond imaging circuit analysis (PICA) can be used to characterize the gate-level performance of such chips and identify the locations and nature of their operational faults. The principles underlying PICA and examples of its use...

A CMOS phase-shift oscillator that uses a phase shift in the conduction of heat is proposed. The oscillator consists of an inverting ampli ̄er and a feedback thermal ̄lter that are integrated on a silicon chip. The thermal ̄lter consists of a polysilicon heater and a MOSFET thermosensor separated from each other by a SiO2 heat-conducting layer. 1 An input signal for the ̄lter travels from the heate...

In this paper a dual voltage CMOS low power output pad is presented. The pads are the interface circuits between the core and the package pins of any integrated circuit. The power consumption of these pads it is a very important parameter for the global power consumption of the integrated circuit that includes them. The proposed pad includes a pre-driver and a final output stage including ESD(e...

This paper provides a comparative study of the proposed global clock distribution methods for high-speed digital integrated circuits. Both non-networked and distributed schemes such as travelling and standing wave clock distributions have been reviewed. Performance metrics are described and qualitatively discussed and non-networked approaches were simulated in a low-power 65nm CMOS process.

VARI 2013 was the fourth European workshop on CMOS Variability. The VARI meeting answers to the need to have a European event on variability, where industry and academia meet to discuss. VARI 2013 was organized by the Karlsruhe Institute of Technology (KIT), in Germany. The objective of VARI is to provide a forum to discuss and investigate the CMOS variability problems in methodologies and tool...

The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However this improved performance comes at the cost of lower noise immunity. Also current trends in integrated circuit technology have increased chances of crosstalk due to capacitive coupling. Though several works have investiga...

Bulk materials commonly used to make CMOS transitors and interconnects pose fundamental challenges in continuous shrinking of their feature-sizes and suffer from increasing "contact resistance" between them, both of which lead to degrading performance and rising energy consumption. Graphene-based transistors and interconnects are a promising nanoscale technology that could potentially address i...