The conventional MOSFETs are likely to reach scaling limitations at gate lengths between 15 and 10nm. The double-gate MOSFET architecture is a promising candidate for scaling to 10nm and below in line with the requirements of the International Technology Roadmap. However, it is expected that direct source-drain tunnelling would be a major limiting factor in the double-gate device. In this paper...

Novel metal oxide semiconductor field effect transistor (MOSFET) architectures aimed at sub IV operation with enhanced current driving capability are reported. In our design, the planar channel region in a conventional MOSFET is replaced by an array of isolated Si wires. Directional metal coverage of the two sidewalls and the top surface of each Si wire help achieve enhanced gate control. Sub I...

A triple metal double gate (TM-DG) MOSFET with high-k dielectrics has been proposed to overcome the short channel effects. We are using top and bottom metal gates with different work functions to screen the effect of drain (DIBL effect). It has been found that this is effective in reducing the short channel effects. The metal gates have been used to remove the poly silicon depletion of conventi...

The efficient detection of charged biomolecules by biosensor with appropriate semiconducting nanomaterials and with optimum device geometry has caught tremendous research interest in the present decade. Here, the performance of various label-free electronic biosensors to detect bio-molecules is investigated by simulation technique. Silicon nanowire sensor, nanosphere sensor and double gate fiel...

Dual Metal Gate (DMG) technology was proposed to reduce the short channel effects (SCE’s) of double gate MOSFETs. But, DMG alone is not enough to rectify the problem of gate tunneling current due to thinning of oxide layer with device downscaling. So, the use of high-k dielectric as gate oxide is considered to overcome the gate tunneling effect. But, high gate dielectric thickness leads to high...

This study proposed a novel 4H-SiC double trench metal-oxide-semiconductor field-effect-transistor (DTMCD-MOSFET) structure with built-in MOS channel diode. Further, its characteristics were analyzed using TCAD simulation. The DTMCD-MOSFET comprised active and dummy gates that divided horizontally; the diode operated through gate p-base N+ source regions at bottom of gate. Because bult-in was p...

Recently, short channel effects (SCE) and power consumption dissipation problems impose tremendous challenges that need imperative actions to be taken deal with for field effect transistor further scale down as semiconductor technology enters into sub-10 nm node. From 3 node beyond, gate all around steps onto the history stage attributed its improved SCE suppressing ability thanks surrounding s...

The role of the inversion-layer centroid in a double-gate metal-oxide-semiconductor field-effect-transistor (DGMOSFET) has been investigated. The expression obtained for the inversion charge is similar to that found in conventional MOSFET’s, with the inversion-charge centroid playing an identical role. The quantitative value of this magnitude has been analyzed in volume-inversion transistors an...

Received April 27, 2012 Revised May 14, 2012 Accepted May 26, 2012 Application of symmetric double gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their layout, which is considerably larger than for a lateral MOSFET on the same technology node. A simple process simulation has been developed to reduce the...