نتایج جستجو برای: elmore delay
تعداد نتایج: 130048 فیلتر نتایج به سال:
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing based placement has minimized area, but with deep submicron design, minimizing wirelength delay is also needed. The algorithm discussed in this paper is the first parallel algorithm for timing driven placement. We have us...
Cogoini, M and Elmore, R. D., 2002, Thermal Treatment of Clays Resulting in MagneticMineral Formation in a Smectite An Analogy to low Burial Conditions, AGU FallMeeting.Miller, A., Elmore, R. D., and Engel, M.H., 2002, Paleomagnetic Dating of Burial Diagenesis inthe Deseret Limestone, Utah, GSA Meeting, Denver.Blumstein, R., Elmore, R. D., Engel, M.H., and Parnell. J., 2002,...
In this paper, by using calculus of variations, we determine the optimal shape for a wire under the Elmore delay model. Coupling capacitance has been taken into consideration explicitly by treating it as another source of grounded capacitance. Given two wires in parallel, one has uniform width and the other has non-uniform width whose shape is described by a function f(x). Let TD be the delay t...
The dependence of the interconnect delay on the interplane via location in three-dimensional (3-D) ICs is investigated in this paper. The delay of these interconnects can be significantly decreased by optimally placing the interplane vias. The via locations that minimize the propagation delay of two-terminal interconnects consisting of multiple interplane vias under the distributed Elmore delay...
abstract As devices and lines shrink into the deep submicron range, the propagation delay of signals can be eeectively improved by repowering the signals using intermediate buuers placed within the routing trees. Almost no existing timing driven oorplan-ning and placement approaches consider the option of buuer insertion. As such, they may exclude solutions, particularly early in the design pro...
Calculation of High-Speed VLSI Interconnects S. Abbaspour, A.H. Ajami, M. Pedram, and E. Tuncer Dept. of EE Systems, University of Southern California, Los Angeles, CA 90089 Magma Design Automation, Santa Clara, CA 95054 Abstract This paper describes an efficient threshold-based filtering algorithm (TFA) for calculating the interconnect delay and slew (transition time) in high-speed VLSI circui...
1209 wire choices are available, because only the look-up table needs to be reconstructed for different choices of wire sizes. The look-up table is constructed very efficiently since every buffer-to-buffer delay is computed incrementally and only once. In other words, as the number of wire sizes increases, the new method is able to gain reduction in delay without need of dramatically increasing...
Sheep farmers are actively seeking unbiased information on the performance of sheep breeds and bloodlines within breeds to help improve their overall profitability. To help answer this question the Elmore Field Days Inc ran a comparison to determine the merit of five ewe genotypes for prime lamb and wool production from 2009 to 2014. Each of the five genotypes were represented by 42 ewes random...
Title: ASSESSING THE INFLUENCE OF ABIOTIC FACTORS AND LEAF-LEVEL PROPERTIES ON THE STABILITY OF GROWING-SEASON CANOPY GREENNESS IN A DECIDUOUS FOREST Vanessa Marie L. Cunningham, Masters of Science, 2016 Thesis directed by: Professor David Nelson UMCES Appalachian Laboratory Professor Andrew Elmore UMCES Appalachian Laboratory Maps depicting spatial pattern in the stability of summer greenness ...
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