Iterative methods for tomographic image reconstruction have the computational cost of each iteration dominated by the computation of the (back)projection operator, which take roughly O(N3) floating point operations (flops) for N × N pixels images. Furthermore, classical iterative algorithms may take too many iterations in order to achieve acceptable images, thereby making the use of these techn...

We introduce a new class of autoequivalences that act on the derived categories of certain vector bundles over Grassmannians. These autoequivalences arise from Grassmannian flops: they generalize Seidel-Thomas spherical twists, which can be seen as arising from standard flops. We first give a simple algebraic construction, which is well-suited to explicit computations. We then give a geometric ...

Along with the progress of VLSI technology delay buffers plays an increasingly critical role on affecting the circuit design and performance. This paper presents the design of a low power buffer. A gated clock ring counter is used to access the memory. The ring counter uses Double edge triggered flip flops instead of traditional flip flops to half the operating frequency. Also combinational ele...

A new Skew Tolerant Flip-Flop (STFF) that achieves the lowest reported delay and energy-delay product while absorbing up to 54ps of clock skew is described. In addition, a method for characterizing clock skew absorbing flip-flops is presented. This comparison is apples-to-apples because the best previously reported flip-flops [1-4] are fabricated on the same wafer and measured using a common te...

Abstract. This paper presents a synthesis method for generating true single-clock dynamic CMOS flip-flops. Such dynamic circuits are used today for very high performance microprocessors and ASICs, however with some supplementary keeper transistors. Many references [1, 11, 12, 13, 16, 17, 20, 22] have presented dynamic single-phase clock latches and flip-flops, however without a corresponding sy...