This study is about the design and analysis of a reversible logic based multiplexer, that is realized using carbon nano tube transistor. Reversible logic realization of the digital circuits offers numerous advantages over conventional circuit design. Power analysis was performed using HSPICE simulation software and the results are obtained for the 2×1 and 4×1 multiplexer transient behavior. The...

This paper presents a new general technique for analysis of noise in static log-domain translinear circuits. It is demonstrated that employing this technique, leads to a general, simple and routine method of the noise analysis. . The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit. Keywords—N...

In this paper we present a novel static differential ultra low-voltage (ULV) CMOS logic style for High-Speed applications . The proposed logic style is aimed for high speed serial adders in ultra low-voltage applications. The differential ultra low-voltage inverter presented have less than 10% of the delay than standard CMOS inverters for supply voltages less than 500mV . The simulated data pre...

The Analysis of power supply noise on VLSI chips is becoming important. In this paper we propose a new methodology for the estimation of power supply noise, caused by digital switching activity. Using transfer function calculated hierarchically from Fmatrices, this method makes it possible with dramatically reduced computational cost to estimate power supply noise at all the nodes in power supp...

A new OTA-based logarithmic-control variable gain current amplifier (LCCA) is presented. It consists of two Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The circuit operates from 0.6V DC power supply and consumes 0.6 μW. The linear-dB controllable output range is 43 dB with maximum error less than 0.5dB. The functionality of the proposed...

A fast settling multipath CMOS OTA for high speed switched capacitor applications is presented here. With the basic topology similar to folded-cascode, bandwidth and DC gain of the OTA are enhanced by adding extra paths for signal from input to output. Designed circuit is simulated with HSPICE using level 49 parameters (BSIM 3v3) in 0.35 um standard CMOS technology. The DC gain achieved is 56.7...

A low-voltage low-power analog CMOS exponential function generator is designed in 0.18μm CMOS standard technology. The proposed circuit uses Taylor’s approximation concept and consists of a linear low-voltage transconductance with two linearization techniques and one low-voltage current squarer circuit for performing this approximation method. Simulation results using HSPICE shows 60 dB-linear ...

A novel class-AB transconductance amplifier, suitable for the input stage of high slew rate CMOS operational amplifier is proposed. The proposed class-AB transconductor is realized from a differential pair of mixed translinear common-drain push-pull circuit. A high speed operational amplifier employing the proposed input stage and a complementary common –source high gain stage is presented. HSP...

In this paper, we propose four wide domino circuits to improve the robustness and reduce the power consumption. All proposed circuits use small potential at the source of the pull down network in the standby mode. Simulation is done using 90nm HSPICE for 32 input OR gate. Our proposed circuits reduce power consumption by 11.75% to 41.85%, improvement of unity noise gain by 41.03% to 90.87% and ...

abstract In this paper, we for the rst time present experimental evidence that the die surface can act as an RC interconnect, becoming an important factor in determining the voltage of a oating wire created by a CMOS open. We present a circuit model for this eeect veriied with HSPICE simulations. A detailed analysis of potential mechanisms behind this phenomenon is provided. We also present our...