A new hiemrchical compactor capable of compacting and pitchmatching hiemrchically defined layouts is described. The hiemrchrcal compactor can handle most input hiemrchres including multr-level hierarchies, over the cell routing and cell rotations and reflections. The compactor simultaneously compacts the contents of all the cells of the layout hiemrchy maintaining the hierarchy of the input lay...

Facility layout planning plays an important role in the manufacturing process and seriously impacts a company’s profitability. A well-planned layout can significantly reduce the total material handling cost. The purpose of this paper is to develop a two-stage inter-cell layout optimization approach by using one of the popular meta-heuristics — the Ant Colony Optimization algorithm. At the first...

| An array cell (AC) architecture for the layout design is described, which is dedicated to lowpower design by means of the NMOS 4-phase dynamic logic. An AC is constructed of (M N)+2 transistors so as to constitute each type of NMOS 4-phase logic gates. A graph theoretic approach is exploited in the layout design to reduce the layout area. A number of experimental results demonstrate the pract...

In this paper we present a physical layout methodology, called dRail, to allow power gated and non-power gated cells to be placed next to each other. This is unlike traditional voltage area layout which separates cells to prevent shorting of power supplies leading to impact on area, routing and power. To implement dRail, a modified standard cell architecture and physical layout is proposed. The...

Digital CMOS Integrated Circuits (ICs) suffer from serious layout features printability issues associated to the lithography manufacturing process. Regular layout designs are emerging as alternative solutions to reduce these ICs systematic subwavelength lithography failures. However, there is no metric to evaluate and compare the layout regularity of those regular designs. In this paper we prop...

sheet metal components design and manufacture need a great deal of experience and know-how. strip layout design is usually done with trial and error until best design for strip layout is finally achieved. knowledge for the system is formulated from plasticity theories, experimental results, and the empirical knowledge of field experts. in this paper, an algorithm which can automatically design ...

In sub-wavelength lithography, light field Alt-PSM (Alternating Phase Shifting Mask) is an essential technology for poly layer printability. In a standard cell based design, the problem of obtaining Alt-PSM compliance for an individual cell layout has been solved well [3]. However, placing Alt-PSM compliant cells together can not guarantee Alt-PSM compliance of the entire chip/block layout due ...

Both the quality of the results of TEX s formula layout algorithm and the complexity of its description in the TEXbook are hard to beat The algorithm is verbally described as an imperative program with very complex control ow and complicated manipulations of the data structures representing formulae In a forthcoming textbook we describe TEX s formula layout algorithm as a functional program tra...