Microprocessor instruction set architectures currently offer support for operations on full processor words and, more recently, on subwords of 8, 16, 32 or 64 bits. However, there is little support for bit-oriented operations beyond the bitwise logical operators and shift operators. Some ISAs, such as PA-RISC and Itanium, offer more advanced instructions such as extract and deposit that combine...

We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2][3] to the verification of pipelined microprocessors with very large Instruction Set Architectures (ISAs). Abstraction of memory arrays and functional units is employed, while the control logic of the processors is kept intact from the original gate-level designs. PEUF is an extension of the logi...

Dynamic information flow tracking is a well-known dynamic software analysis technique with a wide variety of applications that range from making systems more secure, to helping developers and analysts better understand the code that systems are executing. Traditionally, the fine-grained analysis capabilities that are desired for the class of these systems which operate at the binary level requi...

The ISIS is an ultra-fast image sensor with in-pixel storage. The evolution of the ISIS in the past and in the near future is reviewed and forecasted. To cover the storage area with a light shield, the conventional frontside illuminated ISIS has a limited fill factor. To achieve higher sensitivity, a BSI ISIS was developed. To avoid direct intrusion of light and migration of signal electrons to...

Verifying the functional correctness of a processor requires a sound and complete specification of its Instruction Set Architecture (ISA). Current industrial practice is to describe a processor’s ISA informally using natural language often with added semi-formal notation to capture the functional intent of the instructions. This leaves scope for errors and inconsistencies. In this paper we pres...

K. Fleischer,1,2 S. Chandola,1,2 N. Esser,3 W. Richter,2,4 and J. F. McGilp1 1School of Physics, Trinity College Dublin, Dublin 2, Ireland 2Institut für Festkörperphysik, Technische Universität Berlin, Hardenbergstrasse 36, D-10623 Berlin, Germany 3 Department Berlin, Institute for Analytical Sciences (ISAS), Albert-Einstein Strasse 9, 12489 Berlin, Germany 4INFM, Universitá di Roma Tor Vergata...

Quenched and Annealed Ising Spin Glass by Pierluigi Contucci SISSA/ISAS Via Beirut 4, 34014 Trieste , Italy and Universit a di Roma \La Sapienza", Dipartimento di Fisica G10 Teorico P.le Aldo Moro, 00185 Rome, Italy Abstract Using the cluster expansion technique, we estimate, uniformly in the volume, the difference between the quenched and annealed free energy in the high temperature phase of a...

Dynamic binary translation has a history of being used to ease transitions betweenCPU architectures[7], includingmicro-architectures. Modern x86 CPUs, while maintaining binary compatibility with their legacy CISC instruction set, have internal micro-architectures that resemble RISC. High performance x86micro-architectures have long used a CISC decoder front-end to crack complex instructions int...

Understanding land use land cover change (LULCC) is a prerequisite for urban planning and environment management. For LULCC studies in urban/suburban environments, the abundance and spatial distributions of bare soil are essential due to its biophysically different properties when compared to anthropologic materials. Soil, however, is very difficult to be identified using remote sensing technol...

The purpose of this study was to systematically review the instruments used to obtain anesthesia-specific patient satisfaction data and to determine the degree to which each instrument controlled for measurement error bias, such as poor survey design. By using an assessment and evaluation tool developed for the present study that held proven internal reliability and construct validity, we analy...