Low power design is gaining increasing attention as the market for battery powered portable products expands and as power consumption becomes the stumbling block for further system integration. This paper examines strategies to minimize power consumption of digital circuits by reducing the supply voltage, by using power-conscious design methodologies and tools at the behavioral, logic and circu...

Hybrid-redundant number representation has provided a flexible framework for digit-parallel addition in a manner that facilitates area-time tradeoffs for VLSI implementations via arbitrary spacing of redundant digit positions within an otherwise nonredundant representation. We revisit the hybrid redundancy scheme, pointing out limitations such as representational asymmetry, lack of representati...

Powering VLSI die up to 200A in sort test, especially for a structural test system, requires a High Current Device Power Supply (HCDPS) able to provide this amount of current within a very fast response. A new HCDPS structure is implemented to overcome the prober interface constraints and sustain applied voltage during die current transitions with high dI/dt.

This paper presents a survey of layout techniques for designing low power digital CMOS circuits. It describes the many issues facing designers at the physical level of design abstraction and reviews some of the techniques and tools that have been proposed to overcome these difficulties.

In the early 90s the first portable computing applications became widely available. At this time, lower performance than the mains dependant counterparts was accepted. However, today user demand small lightweight portable systems with long battery operating times without any compromise in computing performance. To meet these customer demands, a consequent low power approach has to be taken star...