To investigate the evolution process of LNG (Liquefied Natural Gas) liquid pool and gas cloud diffusion, Realizable k-ε model Eluerian were used to numerically simulate phase leakage diffusion storage tanks. The experimental results showed that some flashed vaporized rapidly form a combustible during continuous leakage. explosive was divided into heavy accumulation, entrainment heat transfer, l...

Adder is the paramount circuit for many complex arithmetic operations. The adder cells mainly focus on reduction of power and increasing of speed. For mobile applications, designers work within a limited leakage power specification in order to meet good battery life. The designers apart from leveling of leakage current to ensure correct circuit operation also focuses on minimization of power di...

In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...

The main purpose of this study is to analyze the current leakage of the power grid due to the change in speed of high-speed rail (HSR). First, using PSIM software as the fundamental basis, this study constructed an overall HSR circuit-based model system, including Scott transformer, auto-transformer, and the track equivalent circuit and grounding system. In addition, this paper sought to study ...

Frequency modulated continuous wave (FMCW) radar systems suffer from permanent leakage due to their continuous operation. Especially in integrated circuits this leads to the well known issue of on-chip leakage due to limited isolation between transmit and receive circuitry. In addition, we investigate short-range (SR) leakage resulting from signal reflections of an unwanted close object located...

In this paper, we present the temperature based simulation and analysis of gate leakage current for the proposed low-stress IP3 SRAM bit cell. In CMOS technologies, cache memory occupies a large die area and this may experience different temperatures. Under temperature variations, performance of the system may degrade. Therefore, in the IP3 SRAM cell, gate leakage has been analyzed under temper...

This study presents a tap-leakage adjustment algorithm to control the tap drifting problem in an adaptive echo canceller. A nonrecursive transversal filter structure and stochastic gradient adaptation algorithm are first studied. On the basis of these studies, the effect of tap drift when the input spectrum does not cover the full band is presented. The tap-leakage algorithm, which has been use...

In nano-scaled CMOS technology, the reduction of soft error rate and leakage current are the most important challenges in designing Field Programmable Gate Arrays (FPGA). To overcome these challenges, based on the observations that most configuration bit-streams of FPGA are zeros across different designs and that configuration memory cells are not directly involved with signal propagation delay...