This paper describes the design and modeling procedure of a novel 5-phase segment type switched reluctance motor (ST-SRM) under simultaneous two-phase (bipolar) excitation of windings. The rotor cores of ST-SRM are embedded in an aluminum block as well as to improve the performance characteristics. The magnetic circuit of the produced ST-SRM is constructed so that the magnetic flux paths are sh...

This paper discuss about PV cell energy based space-vector pulse width modulation (SVPWM) control methods applied for an H-bridge inverter feeding a 3-phase permanent magnet synchronous machine (PMSM) in electric-vehicle (EV) applications. EVs require a high degree of availability continuity of service. Advantages using svpwm minimization of switching losses, balancing of switching rate between...

Boolean functional decomposition techniques built on top of Shannon cofactoring are applied to obtain specialized 4-level forms called Projected Circuits, or P-circuits. We describe their minimization by heuristic and guaranteed approximation algorithms exploiting structural don’t care conditions, and prove properties for special cases about cost estimation and testability. A specific applicati...

This paper addresses the optimum selection of the boost current and threshold current control parameters for the ARCP soft switching technique. The parameters are derived based on a minimization of the output voltage distortion induced by the ARCP operation. The impact of the proper selection of the resonant parameters on the system design is discussed.

This paper presents high-level synthesis problems and solutions specific for low power synthesis. It includes ideas of how to minimize the power consumption by switched capacitance reduction during operation scheduling and resource binding. This process uses switching activity data obtained from simulation of the design at the register transfer level. The novelty of this approach is the use of ...

It is difficult for LUT-based FPGA technology mapping to generate a power-minimal K-input LUT network with minimum depth at one time because a problem for power-minimization was shown to be NP-hard[5]. A problem for area-minimization is also NP-hard, and area-aware algorithms[7][8][9][10] recover area after generating a depthminimum network. On the other hand, existing poweraware algorithms[11]...

This paper proposed the comparison made between Multi-Carrier Pulse Width Modulation, Sinusoidal Pulse Width Modulation and Selective Harmonic Elimination Pulse Width Modulation technique for minimization of Total Harmonic Distortion in Cascaded H-Bridge Multi-Level Inverter. In Multicarrier Pulse Width Modulation method by using Alternate Position of Disposition scheme for switching pulse gene...

In this paper an efficient high step-up converter with a coupled- inductor with soft- switching operation is presented. The proposed topology includes a coupled-inductor boost converter for raising the voltage gain. Moreover, a simple auxiliary resonant circuit composed of an auxiliary switch, a clamping diode and a resonant tank (inductor, capacitor), is adopted in this paper. The coupled-indu...

this paper presents a novel control method to improve the efficiency of low-voltage dc-dc converters at light loads. pulse width modulation (pwm) converters have poor efficiencies at light loads, while pulse frequency modulation (pfm) control is more efficient for the same cases. switching losses constitute a major portion of the total power loss at light loads. to decrease the switching losses...

We consider the following hierarchical equilibrium problem and variational inequality problem abbreviated as HEVP : find a point x∗ ∈ EP F, B such that 〈Ax∗, x − x∗〉 ≥ 0, for all x ∈ EP F, B , where A, B are two monotone operators and EP F, B is the solution of the equilibrium problem of finding z ∈ C such that F z, y 〈Bz, y − z〉 ≥ 0, for all y ∈ C. We note that the problem HEVP includes some p...