Novel, cheap optical components allow for reconfigurable interconnection networks inside multiprocessor systems. In this paper, we introduce some of these components, their limitations, and present simulations that show the resulting speedup of these multiprocessor systems.

Field-Programmable Gate Arrays is an emerging technology which promises easy hardware reconfigurability by software at low cost. Entire systems can be built in which some parts are programmable. Such systems implement various architectures. Each architecture prototype is a detailed hardware implementation of the architecture -including I/O-on which complex software systems can be ported. We hav...

The paper is devoted to the issues concerning with modeling and simulating of hierarchical database multiprocessor systems. The requirements for a model of parallel database systems are defined. A new computational model of the hierarchical database multiprocessor architecture is described. This model is called DMM (Database Multiprocessor Model) and designed for OLTP workload. It allows us to ...

The rate-monotonic algorithm is arguably one of the most popular algorithms for scheduling systems of periodic real-time tasks. The rate-monotonic scheduling of systems of periodic tasks on uniform multiprocessor platforms is considered here. A simple, sufficient test is presented for determining whether a given periodic task system will be successfully scheduled by this algorithm upon a partic...

Sung Woo Chung is the designated presenter and he will attend the conference should his paper accepted Primary technical subject area : A. Computer Architecture and Super Computing 1. Introduction As microprocessors speeds continue to improve at a very fast rate the bandwidth requirements for system level interconnections in multiprocessor systems rule out the use of shared buses even for small...

The heterogeneity of the multiple processing elements (PEs) is a feature real-time embedded systems. General-purpose processors and several processors, as well dedicated high-speed interfaces, are among these elements. Communication between most significant characteristics developing such complex Furthermore, synchronization common issue during interprocessor communication in Debugging testing ...

With the advent of semi conductor technology, the development of more complex embedded real time applications is made possible today. This accelerates the development and support for multiprocessor based systems. The paper presents the development of “a power-aware real time embedded system for temperature monitoring and control in safety critical applications”. The main objective of the work i...

We show that no multiprocessor system that contains at least one processor with memory size smaller than at least two other processors can be scheduled nearly on line to minimize the finish time. An efficient nearly on line algorithm to minimize Cmax is developed for multiprocessor systems that do not satisfy the preceding requirement. Finally, we review the complexity of some other scheduling ...