In this paper, we propose a powerand area-efficient architecture of Turbo decoder. In order to improve the nonfunctional performance metrics such as power consumption and area, we use the trade-off method between bit error rate (BER) performance and the two non-functional performance metrics. Our proposed architecture shows about 16.7% reduction in power consumption and about 22.5% reduction in...

Concern over power dissipation coupled with the continuing rise in system size and complexity means that there is a growing need for high-level design tools capable of automatically optimising systems to take into account power dissipation, in addition to the more conventional metrics of area, delay and testability. Current methods for reducing power consumption tend to be ad-hoc: for example, ...

Power consumption reduction is transpiring drift in area of VLSI digital signal processing. This gives rise to need of minimization of silicon area which is done by folding algorithm. As silicon area decreases power consumption of a circuit decreases. Folding is an algorithm which reduces silicon chip area by combining various arithmetic operations into one operation by time scheduling techniqu...

This paper presents a new circuit design for digital pulse-width modulators (DPWM). In this paper, we improve the structure of hybrid DPWM by utilization of the separation of MSB/LSB group. In addition, a delay line element is shared by MSB/LSB group to reduce the power consumption. The new DPWM prototype circuit operates at 600 MHz clock frequency and has 1.1-mW power consumption. An experimen...

Wireless sensor networks(WSN) have unique properties that distinguished them from other wireless networks and have special challenges. Not-chargeable, not-changeable and limited power supplies of sensor nodes is the most important challenge of this networks, and if the power supply of node expired, a part of data maybe lost. Because of the importance of covers in wireless sensors, in this work ...

Data communications infrastructure plays an importantrole to communicate information (e.g., related to powergeneration, supply, consumption) among the variouselements in the smart grid. In this letter, excerpted from[1], we consider the reliability of the smart grid datacommunications infrastructure and its impact on theoptimization of power consumption in the smart ...

in this paper, a low voltage and low power (lv/lp) operational transconductance amplifier (ota) using fgmos (floating-gate mos) transistor is proposed. the relative tuning range of 50 is achieved in this ota while only consumes 40 µw with 1.0 v supply voltage in tsmc 0.18 µm cmos technology. the simulation results of the proposed ota show an open loop gain of 30.2 db and a unity gain frequency ...

Due to fast growth of portable devices, power consumption and timing delays are the two important design parameters in high speed and low power VLSI design arena. In this paper we presents the comparison of single edge triggered static D flip-flop designs to show the benefit of power consumption ,delay and power delay product on the basis of area efficiency.