22. CC-BY-NC-ND 4.0 International license peer-reviewed) is the author/funder. It is made available under a The copyright holder for this preprint (which was not. ABSTRACT 23 24 Human scene recognition is a rapid multistep process evolving over time from single 25 scene image to spatial layout processing. We used multivariate pattern analyses on 26 magnetoencephalography (MEG) data to unravel t...

The visual layout of a webpage can provide valuable clues for certain types of Information Extraction (IE) tasks. In traditional rule based IE frameworks, these layout cues are mapped to rules that operate on the HTML source of the webpages. In contrast, we have developed a framework in which the rules can be specified directly at the layout level. This has many advantages, since the higher lev...

Cell culture seed trains-the generation of a sufficient viable cell number for the inoculation of the production scale bioreactor, starting from incubator scale-are time- and cost-intensive. Accordingly, a seed train offers potential for optimization regarding its layout and the corresponding proceedings. A tool has been developed to determine the optimal points in time for cell passaging from ...

This paper experimentally investigates the effectiveness of regularly-placed bit-slice layout and transistor-level optimization to datapath circuit performance. We focus on cell-base design flows with transistorlevel circuit optimization. We examine the effectiveness through design experiments of 32-bit carry select adder and 16-bit tree-style multiplier in a 0.35μm technology. From the experim...

this paper presents a strategy for using harmony search algorithm in facility layout optimization problems. in this paper an adapted harmony search algorithm is developed for solving facility layout optimization problems. this method finds an optimal facility arrangement in an existing layout. two real-world case studies are employed to demonstrate the efficiency of this model. a comparison is ...

A new hiemrchical compactor capable of compacting and pitchmatching hiemrchically defined layouts is described. The hiemrchrcal compactor can handle most input hiemrchres including multr-level hierarchies, over the cell routing and cell rotations and reflections. The compactor simultaneously compacts the contents of all the cells of the layout hiemrchy maintaining the hierarchy of the input lay...

Facility layout planning plays an important role in the manufacturing process and seriously impacts a company’s profitability. A well-planned layout can significantly reduce the total material handling cost. The purpose of this paper is to develop a two-stage inter-cell layout optimization approach by using one of the popular meta-heuristics — the Ant Colony Optimization algorithm. At the first...

| An array cell (AC) architecture for the layout design is described, which is dedicated to lowpower design by means of the NMOS 4-phase dynamic logic. An AC is constructed of (M N)+2 transistors so as to constitute each type of NMOS 4-phase logic gates. A graph theoretic approach is exploited in the layout design to reduce the layout area. A number of experimental results demonstrate the pract...