|A simple cascode circuit with the gate voltage of the cascode transistor being controlled by a feedback ampli er and thus named `regulated cascode' is presented. In comparison to the standard cascode circuit the minimum output voltage is lower by about 30 to 60% while the output conductance and the feedback capacitance are lower by about 100 times. An analytical large-signal, small-signal, and...

A current mirror (CM) based on self cascode arrangement, useful for low voltage analog and mixed mode circuit is proposed. The CM uses 4 MOSFETs, has high input and output swing, operating at ± 0.5 V supply. Pspice simulations confirm the high performance of this CM having a bandwidth of 2.1 GHz. Resistive and capacitive compensations result in about threefold bandwidth increase to 6.1 GHz.

Differential Cascode Voltage Switch (DCVS) is a well-known logic style, which constructs robust and reliable circuits. Two main strategies are studied in this paper to form static DCVS-based standard ternary fundamental logic components in digital electronics. While one of the strategies leads to fewer transistors, the other one has higher noise margin. New designs are simulated with HSPICE and...

A modification of the conventional Flipped Voltage Follower (FVF) to enhance its output resistance is presented. It consists of replacing the conventional cascoding transistor of the basic cell by a regulated cascode scheme. This decreases the output resistance by a factor gmro approximately, the gain of a transistor as an amplifying stage. This is achieved with only two additional transistors ...

This work presents a comparative study of the transcapacitances an asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs with different gate lengths. analysis was done by means two-dimensional numerical simulations. Simulated results show influence others on gate-to-gate capacitance for ASC SOI device GC device.

AbstractThis paper deals with the design and analysis of folded cascode operational transconductance amplifier in different regions of operations: strong, weak and moderate inversion region. The folded cascode OTA consists of cascode OTA and cascode gain boosting technique. By using 0.35μm technology, the simulation shows DC gain of 78.42dB with a unity gain bandwidth of 446.07 MHz and power co...

This paper focuses on the analysis of InGaZnO thin-film transistors (TFTs) and circuits under the influence of different temperatures and bias stress, shedding light into their robustness when used in real-world applications. For temperature-dependent measurements, a temperature range of 15 to 85 °C was considered. In case of bias stress, both gate and drain bias were applied for 60 min. Though...

This paper presents the design and experimental characterization of a 10 Gb/s electronic driver for silicon Mach-Zehnder modulators (MZMs). is able to operate in harsh environments characterized by radiation levels up 1 Grad(SiO 2 ) total ionizing dose (TID). To compensate detrimental effects th...