CMOS implementations for RF applications often employ technology modifications to reduce the silicon substrate loss at high frequencies. The most common techniques include the use of a high-resistivity substrate (ρ>10Ω-cm) or silicon-on-insulator (SOI) substrate and precise bondwire inductors [1, 2]. However, these techniques are incompatible with low-cost CMOS manufacture. This design demonstr...

We report the first observation of Stimulated Raman Scattering (SRS) in silicon waveguides. Amplification of the Stokes signal, at 1542.3 nm, of up to 0.25 dB has been observed in Silicon-on-Insulator (SOI) waveguides, using a 1427 nm pump laser with a CW power of 1.6 W, measured before the waveguide. Two-Photon-Absorption (TPA) measurements on these waveguides are also reported, and found to b...

Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the context of testing Silicon-On-Insulator (SOI) integrated circuits. In the VLV regime, the history effect, which describes how delays through SOI circuits vary based on a circuit’s recent switching history, is amplifie...

This paper presents the design and test results of a prototype monolithic pixel sensor manufactured in deep-submicron fullydepleted Silicon-On-Insulator (SOI) CMOS technology. In the SOI technology, a thin layer of integrated electronics is insulated from a (high-resistivity) silicon substrate by a buried oxide. Vias etched through the oxide allow to contact the substrate from the electronics l...

This last decade silicon-on-insulator (SOI) MOSFET technology has demonstrated its potentialities for high frequency (reaching cutoff frequencies close to 500 GHz for n-MOSFETs) and for harsh environments (high temperature, radiation) commercial applications. For RF and system-onchip applications, SOI also presents the major advantage of providing high resistivity substrate capabilities, leadin...

Silicon nano-wires were fabricated using thin Silicon on Insulator (SOI) wafers and a combination of anisotropic wet etching by TetraMethyl Ammonium Hydroxide (TMAH) and Local Oxidation of Silicon (LOCOS). These nano-wires were submitted to laser exposure using gas immersion laser doping (GILD). The result was the formation of either periodic nano-structures or silicon balls. Since the process ...

In this paper, electrical characteristics of nanoscale single-, double-, and all-around-gate silicon-0n-insulator (SOI) devices are computational investigated by using a quantum mechanical simulation. Considering several important properties, such as on/off current ratio, drain induced channel barrier height lowering, threshold voltage roll off, and subthreshold swing, geometry aspect ratio is ...

The standard platform for silicon photonics has been ridge or channel waveguides fabricated on silicon-on-insulator (SOI) wafers. SOI waveguides are so versatile and the technology built around it is so mature and popular that silicon photonics is almost regarded as synonymous with SOI photonics. However, due to several shortcomings of SOI photonics, novel platforms have been recently emerging....

Silicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (VTH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study...

We review progress toward microcantilever arrays with in-plane photonic readout for biosensing applications. Microcantilever arrays are fabricated on individual silicon-on-insulator (SOI) chips and integrated with two-layer polydimethylsiloxane (PDMS) microfluidics that incorporate fluid channels and valves. Microcantilever functionalization is accomplished by inkjetting appropriate fluids onto...