The trade-off between exploration of new ideas and exploitation of certainties create a need for managing a balance between those two concepts within organizations. To align with an associated strategy, we suggest an IT architecture with an embedded mechanism to manage this balance when trying new approaches. A prototype and evaluation with encouraging results show the viability of the proposed...

We consider an information-theoretic objective function for statistical modeling of time series that embodies a parametrized trade-off between the predictive power of a model and the model’s complexity. We study two distinct cases of optimal causal inference, which we call optimal causal filtering (OCF) and optimal causal estimation (OCE). OCF corresponds to the ideal case of having infinite da...

Reconfigurable architectures provide power efficiency, flexibility and high performance for next generation embedded multimedia devices. ADRES, the IMEC Coarse-Grained Reconfigurable Array architecture and its compiler DRESC enable the design of reconfigurable 2D array processors with arbitrary functional units, register file organizations and interconnection topologies. This creates an enormou...

In this paper, we propose an active grid resource management system supported by active networks for computational grid. First, we construct a scalable two-level resource management architecture. In this architecture, resources in the system are divided into multiple autonomous domains. In each domain, an active resource tree (ART) is organized with resources as its leaf nodes and active router...

Digital platforms serve as a foundation upon which manifold firms develop complementary add-ons to address heterogeneous customer needs. In order to successfully stimulate partner contributions platform vendors need to share knowledge with partners that enables them to develop add-ons. Vendors face a trade-off between addressing idiosyncratic needs of partners while ensuring the scalability of ...

In compiler design there is often a trade-off between compilation time and target code quality. This trade-off is even more delicate in an incremental compiler, where low response time is crucial. Rather than present a single rigid incremental compiler, this paper explores the design of a flexible framework for building incremental compilers. The system described is adaptable to different workl...

The enhancement in silicon technology facilitates the integration of a higher number of cores on a single chip. Considering the current CMOS integration technology tendency; in the next future, systems are expected to scale up the number of cores, resulting in architectures composed by thousands of cores (i.e., namely kilocore architecture). The architecture of these kilo-core systems is still ...

Networks-on-Chip (NoC) design is a trade-off between cost and performance. To realize the best trade-off between these factors, researchers have recently proposed using network partitioning techniques to customize the NoC architecture according to the application requirements. In this paper, the impact of using partitioning on different NoC metrics; namely, power, area, and delay, is analyzed. ...

In designing software systems, security is typically only one design objective among many, which may compete with other objectives such as privacy and usability. Too often, security mechanisms are adopted without explicit recognition of competing design objectives and their origins in stakeholder interests. Ultimately, security is about balancing the trade-offs among the competing goals of mult...