The aim of the proposed paper is an analytical model and realization characteristics for tunnel field-effect transistor (TFET) based on charge plasma (CP). One most applications TFET device which operates CP technique biosensor. CP-TFET to be used as effective detect uncharged molecules bio-sample solution. Charge one some techniques that recently invited induce carriers inside devices. In this...

The drain current improvement in a Negative Capacitance Double Gate Tunnel Field Effect Transistor (NC-DG TFET) with the help of Heterojunction (HJ) at source-channel region is proposed and modeled this paper. gate oxide TFET stacked configuration high-k over low-k to improve control without any lattice mismatches. Tangent Line Approximation (TLA) method used here model accurately. validated by...

This work explores homo- and heterojunction tunnel field-effect transistor (TFET)-based NAND NOR logic circuits using 30 nm technology compares their performance in terms of power consumption propagation delay. By implementing homojunction TFET-based circuits, it has been observed that consumes less than the gate since current drawn by PTFET pull-up network is higher. The delay lower due to its...

Present complementary metal–oxide–semiconductor (CMOS) technology with scaled channel lengths exhibits higher energy consumption in designing secure electronic circuits against hardware vulnerabilities and breaches. Specifically, CMOS sense amplifier-based differential power analysis (DPA) countermeasures at show large consumption, increased vulnerability. Additionally, spin-transfer torque mag...

In this paper, we propose a doping-less dual-material double-gate tunnel field-effect transistor with P+ pocket (PP-DMG TFET). This gate-engineered technique is typically used in MOSFET to improve device performance. The embedded at the source side enhance performance of pocket-engineered PP-DMG TFET device. paper compares four DG-TFET-based devices, i.e. single-material gate (SMG), (PP-SMG), (...

The electrostatic doping technique has a remarkable ability to reduce random dopant fluctuations (RDFs), fabrication complexity and high thermal budget requirement in the process of nano-scale devices. In this paper, for first time it been propose simulated junction-free electrostatically doped tunnel field-effect transistor (JF-ED-TFET) based biosensor label-free biosensing applications. diele...

We demonstrated a nanowire gate-all-around (GAA) negative capacitance (NC) tunnel field-effect transistor (TFET) based on the GaAs/InN heterostructure using TCAD simulation. In gate stacking, we proposed tri-layer HfO2/TiO2/HfO2 as high-K dielectric and hafnium zirconium oxide (HZO) ferroelectric (FE) layer. The GAA-TFET overcomes thermionic limitation (60 mV/de...

Complementary fully-depleted Ge interband-tunneling field-effect transistors (TFETs) and static inverters are modeled to quantify TFET performance relative to Si MOSFETs. SYNOPSYS TCAD is used to compute the two-dimensional electrostatics and determine the tunnel junction electric field. This electric field is used in an analytic expression to compute the tunnel current. The speed and power per...

In this paper, a three dimensional (3-D) analytical model of surface potential has been derived for gate engineered trapezoidal trigate Tunnel Field Effect Transistor (TFET). The obtained by assuming parabolic approximation the profile and solving 3-D Poisson equation using appropriate boundary conditions. device considered in work is silicon based TFET with composed two materials different fun...