Hardware description systems could benefit from advances in programming language design. Recent research, in the area of rich type systems suggests hardware description languages could use types to (1) structure, (2) guarantee correctness, and (3) track properties of hardware descriptions. In this paper, we use the language Ωmega to illustrate these points.

The suggested new approach based on B-Event formal technics consists of suggesting aspects and constraints related to the reliability of NoC (Network-On-chip) and the over-cost related to the solutions of tolerances on the faults: a design of NoC tolerating on the faults for SoC (System-on-Chip) containing configurable technology FPGA (Field Programmable Gates Array), by extracting the properti...

Received Jan 29, 2017 Revised Mar 29, 2017 Accepted Apr 10, 2017 Recently, research has picked up a fervent pace in the area of fault diagnosis of electrical vehicle. Like failures of a position sensor, a voltage sensor, and current sensors. Three-phase induction motors are the “workhorses” of industry and are the most widely used electrical machines. This paper presents a scheme for Fault Dete...

In this paper we illustrate a fuzzy logic system design strategy based on a high level description. Employing this high level description, the knowledge base is described in a language in appearance close to the natural language with the particularity that it uses a hardware description language (VHDL) directly synthesizable on an FPGA circuit. In addition, we analyze FPGA implementations of di...

Field programmable gate arrays (FPGA) are increasingly being used in the high performance and scientific computing community to implement floating-point based system. The reversible single precision floating point multiplier (RSPFPM) requires the design of reversible integer multiplier (2424) based on operand decomposition approach. Reversible logic is used to reduce the power dissipation than...

This paper presents the design and verification of 16 bit processor. The Booth multiplier and restoring division are integrated in to the ALU of the proposed processor. The processor is described in structural level to verify the general understanding of the system. The processor has 16-bit instruction based on three different format R-format, I-format and J-format. The control unit generates a...

The very large number of channels and high data rates in modern particle physics experiments put very stringent requirements on the acquisition of data. To reduce the cost as well as the number of cables required to transport the data from detector to counting room, it is necessary to use very large scale integrated circuits for pre-processing the data right on the front-end circuit boards. Als...

Fault injection is an important technique for the evaluation of design metrics such as reliability, safety, and fault coverage. Fault injection involves inserting faults into a system and monitoring the system to determine its behavior in response to the fault. Recently, designers are realizing the advantages of using simulation to perform fault injection on a model of the design, as opposed to...