Reversible logic enables ultra-low power circuit design and quantum computation. Quantum-dot Cellular Automata (QCA) is the most promising technology considered to implement reversible circuits, mainly due correspondence between features of QCA circuits. This work aims push forward state-of-the-art QCA-based circuits implementation by proposing a novel full adder\full subtractor (FA\FS). At fir...

As technology has scaled down, the implications of leakage current and power analysis for memory design have increased. To minimize the short channel effect Double-gate FinFET can be used in place of conventional MOSFET circuits due to the self-alignment of the two gates. Design for XOR and XNOR circuits is suggested to improve the speed and power. These circuits act as basic building blocks fo...

The goal of the present paper is to obtain accurate estimates for the complexity of two practical multiplication methods: standard (school) and Karatsuba [1]. Here, complexity is the minimal possible number of gates in a logic circuit implementing the required function over the basis {AND,OR,XOR,NAND,NOR,XNOR}. One can find upper estimates for the said methods e.g. in [2]. The standard method h...

In modern computers, computation is performed by assembling together sets of logic gates. Popular gates like AND, OR and XOR, processing two logic inputs and yielding one logic output, are often addressed as irreversible logic gates, where the sole knowledge of the output logic value is not sufficient to infer the logic value of the two inputs. Such gates are usually believed to be bounded to d...

A novel all-optical logic device, composed of an SOA and an optical filter, is demonstrated for AND, OR and XOR gates at 10 Gb/s. Simulation indicates the device can operate at much higher bit rate.

XOR & AND gates are most important basic building blocks of any VLSI applications. These gates can be implemented in different architectures by using different circuit designs techniques. This paper evaluates and compares the performance of various design techniques of XOR-AND gates. The performances of these techniques have been evaluated by Tanner Tools V13 using the 90nm CMOS technology. In ...

Using a set of genetic logic gates (AND, OR and XOR), we constructed a binary full-adder. The optimality analysis of the full-adder showed that, based on the position of the regulation threshold, the system displays different optimal configurations for speed and accuracy under fixed metabolic cost. In addition, the analysis identified an optimal trade-off curve bounded by these two optimal conf...

In this paper, a description of a general purpose neural network chip with on-chip learning is given. The design is implemented using Xilinx Vertex II XCV 1000 Field Programmable Gate Array (FPGA). An XOR gate simulation was used as a testing application. Results and comparison of both software and hardware implementations are listed. A second testing application in noise cancellation and voice...

In this paper we introduce a new transformation method and a multiplication algorithm for multiplying the elements of the field GF(2) expressed in a normal basis. The number of XOR gates for the proposed multiplication algorithm is fewer than that of the optimal normal basis multiplication, not taking into account the cost of forward and backward transformations. The algorithm is more suitable ...