نتایج جستجو برای: کد ldpc

تعداد نتایج: 8914  

پایان نامه :وزارت علوم، تحقیقات و فناوری - دانشگاه تربیت مدرس - دانشکده برق و کامپیوتر 1391

کدهای بررسی توازن کم چگال(ldpc)، در حال حاضر به عنوان بهترین کدهای تصحیح خطای شناخته شده، به دلیل برخورداری از توانایی بالا در تصحیح خطا و مطابقت با استانداردهای مختلف از جمله 802.16e، توجه زیادی را به خود جلب کرده اند. از این رو امروزه تکنیک های کارآمد برای دکدینگ کدهای ldpc، بسیار مورد توجه قرار گرفته است. اگرچه عملکرد این کدها به صورت تئوری بسیار موفقیت آمیز بوده است، اما در عمل، پیاده سازی ...

Journal: :JCM 2017
Chang-Uk Baek Ji-Won Jung

—In this paper, MIMO (Multiple-Input-Multiple Output) system based on turbo equalization techniques which LDPC (Low Density Parity Check) codes were outer code and STTC (Space Time Trellis Code) were employed as an inner code are studied. LDPC decoder and STTC decoder are connected through the interleaving and de-interleaving that updates each other's information repeatedly. On the receiver si...

2009
Manik Raina Predrag Spasojević

OF THE THESIS Properties of LDGM-LDPC codes With Applications to Secrecy Coding by Manik Raina Thesis Directors: Professor Predrag Spasojević The ensemble of low-density generator-matrix/low-density parity-check (LDGM-LDPC) codes has been proposed in literature. In this thesis, an irregular LDGM-LDPC code is studied as a sub-code of an LDPC code with some randomly punctured outputbits. It is sh...

2008
Juan Carlos Serrato Vital

The research project described in this thesis concentrates on the study, and application of specific channel coding techniques, in particular, low-density parity-check (LDPC) codes, iterative decoding on Tanner graphs, and their application on joint iterative receivers based on the turbo principle, previously proposed. The construction of random LDPC codes that fulfil certain desirable characte...

2007
Shadi Abu-Surra Gianluigi Liva William E. Ryan

We first consider the design of generalized LPDC (G-LDPC) codes with recursive systematic convolutional (RSC) constraint nodes in place of the standard single parity check constraint nodes. Because rate-1/2 RSC nodes lead to low-rate G-LDPC codes, we consider high-rate tail-biting RSC nodes for which Riedel’s APP-decoder based on the reciprocal-dual code trellis becomes necessary. We present th...

Journal: :IEEE Trans. Communications 2015
Kechao Huang David G. M. Mitchell Lai Wei Xiao Ma Daniel J. Costello

In this paper, we compare the finite-length performance of protograph-based spatially coupled lowdensity parity-check (SC-LDPC) codes and LDPC block codes (LDPC-BCs) over GF(q). In order to reduce computational complexity and latency, a sliding window decoder with a stopping rule based on a soft bit-error-rate (BER) estimate is used for the q-ary SC-LDPC codes. Two regimes are considered: one w...

Journal: :CoRR 2014
Alexey A. Frolov Pavel S. Rybin

In this paper we investigate the minimum code distance of QC LDPC codes [1], [2], [3]. These codes form an important subclass of LDPC codes [4], [5]. These codes also are a subclass of protograph-based LDPC codes [6]. QC LDPC codes can be easily stored as their parity-check matrices can be easily described. Besides such codes have efficient encoding [7] and decoding [8] algorithms. All of these...

2008
Mathieu CUNCHE

This work focuses on the decoding algorithm of the LDPC large block FEC codes for the packet erasure channel, also called AL-FEC (Application-Level Forward Error Correction). More specifically this work details the design and the performance of a hybrid decoding scheme, that starts with the Zyablov iterative decoding algorithm, a rapid but suboptimal algorithm in terms of erasure recovery capab...

Journal: :IEICE Transactions 2012
Takayuki Nozaki Kenta Kasai Kohichi Sakaniwa

In this paper, we compare the decoding error rates in the error floors for non-binary low-density parity-check (LDPC) codes over general linear groups with those for non-binary LDPC codes over finite fields transmitted through the q-ary memoryless symmetric channels under belief propagation decoding. To analyze non-binary LDPC codes defined over both the general linear group GL(m, F2) and the f...

2008
Merve Peyic Hakan A. Baba Ilker Hamzaoglu Mehmet Keskinoz

In this paper, we present a low power hybrid low-density-parity-check (LDPC) decoder hardware implementing layered min-sum decoding algorithm for IEEE 802.11n Wireless LAN Standard. The LDPC decoder hardware, which has 27 check node datapaths and 24x162 variable node memory, is implemented in Verilog HDL and verified to work correctly in a Xilinx Virtex II FPGA. For 648 block length and 1/2 cod...

نمودار تعداد نتایج جستجو در هر سال

با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید