Microcontrollers are widely used on simple systems; thus, how to keep them operating with high robustness and low power consumption are the two most important issues. It is widely known that asynchronous circuit is the best solution to address these two issues at the same time. However, it’s not very easy to realize asynchronous circuit and certainly very hard to model processors with asynchron...

The Boolean autonomous dynamical systems, also called regular autonomous asynchronous systems are systems whose ‘vector …eld’is a function : f0; 1gn ! f0; 1gn and time is discrete or continuous. While the synchronous systems have their coordinate functions 1; :::; n computed at the same time: ; ; ; ::: the asynchronous systems have 1; :::; n computed independently on each other. The purpose of ...

Most of the microelectronic circuits fabricated today are synchronous, i.e. they are driven by one or several clock signals. Synchronous circuit design faces several fundamental challenges such as high-speed clock distribution, integration of multiple cores operating at different clock rates, reduction of power consumption and dealing with voltage, temperature, manufacturing and runtime variati...

A circuit’s clock is often the single largest source of power dissipation is a digital system. Removing the clock should therefore reduce power consumption. The clock also forces the system to run at the worst case timing for every operation. Removing it should also allow the circuit to start the next operation upon completion of the current one. This is often the key motivation for designing a...

Though the logical correctness of an asynchronous circuit is independent of implementation delays, the cycle time of an asynchronous circuit is of great importance to the designer. Oftentimes, the insertion of buffers to such circuits reduces the cycle time of the circuit without affecting the logical correctness of the circuit. This optimization is called slack matching. In this thesis the sla...

The null convention logic (NCL) based circuit design methodology eliminates the problems related to noise, clock tree, electromagnetic interference and also reduces significant power consumption. In this paper, we would like demonstrate advantage of low consumption NCL asynchronous on a large scale, thus used advanced encryption standard (AES) as an illustrative example. addition, proposed two ...

A network-on-chip (NoC) offers high performance, flexibility and scalability in communication infrastructure within multi-core platforms. However, NoCs contribute significantly to the overall system’s power consumption. The double-layer energy efficient synchronous-asynchronous circuit-switched NoC (CS-NoC) is proposed enhance utilization. To reduce dynamic consumption, single-rail asynchronous...

-This paper presents the novel concept of desynchronization which deals with deriving an asynchronous circuit from an optimized synchronous circuit by replacing the clock distribution tree by a handshaking network. A new controller for implementing desynchronization is also proposed which achieves more concurrency. This concept is implemented on a MIPS processor and a comparison of the synchron...

We consider secure multi-party computation in the asynchronous model and present an efficient protocol with optimal resilience. For n parties, up to t < n/3 of them being corrupted, and security parameter κ, a circuit with c gates can be securely computed with communication complexity O(cnκ) bits. In contrast to all previous asynchronous protocols with optimal resilience, our protocol requires ...