This paper describes a general methodology to prototype asynchronous systems onto LUT based FPGAs. The main objective is to offer to the system designers the powerfulness of standard synchronous FPGAs to prototype their asynchronous circuits or mixed synchronous/asynchronous circuits. To avoid hazard in FPGAs, the appearance of hazard in configurable logic cells is analyzed and a technique base...

Numerous applications of synthetic biology require the implementation of scalable and robust biological circuits with information processing capabilities. Basic logic structures, such as logic gates, have already been implemented in prokaryotic as well as in eukaryotic cells. Biological memory structures have also been implemented either in vitro or in vivo. However, these implementations are s...

Adiabatic logic can offer significant power reductions in comparison to conventional CMOS circuits ([1], [2]). Although numerous architectures have been proposed in the literature for synchronous circuit implementations, not much work has been done on asynchronous logic due to the difficulties of such implementations. This paper presents a new adiabatic power supply controller for asynchronous ...

We introduce a new sequential Monte Carlo algorithm we call the particle cascade. The particle cascade is an asynchronous, anytime alternative to traditional sequential Monte Carlo algorithms that is amenable to parallel and distributed implementations. It uses no barrier synchronizations which leads to improved particle throughput and memory efficiency. It is an anytime algorithm in the sense ...

Bounds on test sequence length can be used as a testability measure. We give a procedure to compute the upper bound on test sequence length for an arbitrary sequential circuit. We prove that the bound is exact for a certain class of circuits. Three design rules are specified to yield circuits with lower test sequence bounds.

This paper considers the general problem of the synthesis of asynchronous combinational and sequential circuits based on the assumption that gate delays may be unbounded and that line delays are suitably constrained. Certain problems inherent to circuit realizations with unbounded gate delays are discussed and methods of solving them are proposed. Specific synthesis techniques are presented for...

Numerous applications, from high-performance scientific computing to large, highresolution multi-touch interfaces to strong artifical intelligence, push the practical physical limits of modern computers. Typical computers attempt to hide the physics as much as possible, running software composed of a series of instructions drawn from an arbitrary set to be executed upon data that can be accesse...

Computer science has served to insulate programs and programmers from knowledge of the underlying mechanisms used to manipulate information, however this fiction is increasingly hard to maintain as computing devices decrease in size and systems increase in complexity. Manifestations of these limits appearing in computers include scaling issues in interconnect, dissipation, and coding. Reconfigu...