نتایج جستجو برای: block layout
تعداد نتایج: 180188 فیلتر نتایج به سال:
Block diagram of the DCAM-103 digital camera (re-drawn from the website of LSI Logic Corp.). ix Intellectual property reuse-based design flow. Design technology innovations and their impact to design productivity. A Java GUI for watermarking the Boolean Satisfiability problem. Layout of the DES benchmark without watermark(left) and the one with a 4768-bit message embedded (right).
Thanks to the collaboration between two laboratories, we present different techniques to measure thermal diffusivity. A brief description of any technique both in the experimental layout and in the processing algorithms is given. Results obtained on samples cut from the same block of stainless steel AISI 304, are reported. Uncertainty evaluation of any measurement is reported as well.
This paper presents a mixed-integer programming formulation to find optimal solutions for the block layout problem with unequal departmental areas arranged in flexible bays. The nonlinear department area constraints are modeled in a continuous plane without using any surrogate constraints. The formulation is extensively tested on problems from the literature. © 2005 Elsevier B.V. All rights res...
With the continually increasing need for transmission of digital data over noisy channels, need for error control and correction techniques are also raising as well. There are various techniques and methods available for transmission of digital data over noisy channel but Viterbi Decoder is most efficient .It provides better coding gain at lower cost and good performance Convolutional encoding ...
The emphasis of this study is put on developing an automatic approach to identifying a given unknown technical journal from its cover page. Since journal’s cover pages contain a great deal of information, determining the title of an unknown journal using optical character recognition techniques seems difficult. Comparing the layout structures of text blocks on the journals’ cover pages is an ef...
101 The Design of an SRAM-Based Field-Programmable Gate Array, Part II: Circuit Design and Layout Paul Chow, Soon Ong Seo, Jonathan Rose, Kevin Chung, Gerard P aez-Monz on and Immanuel Rahardja Abstract|Field-Programmable Gate Arrays (FPGAs) are now widely used for the implementation of digital systems and many commercial architectures are available. Although the literature and data books conta...
ÐHigh-performance multiprocessor workstations are becoming increasingly popular. Since many of the workloads running on these machines are operating-system intensive, we are interested in exploring the types of support for the operating system that the memory hierarchy of these machines should provide. In this paper, we evaluate a comprehensive set of hardware and software supports that minimiz...
High-performance multiprocessor workstations are becoming increasingly popular. Since many of the workloads running on these machines are operating-system intensive, we are interested in what sort of support for the operating system should the memory hierarchy of these machines provide. This paper addresses this question. This paper shows that the largest performance losses for the operating sy...
The problem of general block placement in VLSI is the topic of this paper. Among the existing approaches to its solution we concentrate on the constructive one, where blocks are selected and located one at a time. Two of the main features of the constructive approach are its high computational efficiency and its ability to support both automatic and interactive placement. We present some well-k...
Consider laying out a fixed-topology tree of N nodes into external memory with block size B so as to minimize the worst-case number of block memory transfers required to traverse a path from the root to a node of depth D. We prove that the optimal number of memory transfers is Θ D lg(1+B) when D = O(lgN) lgN lg ( 1+ lg N D ) when D = Ω(lgN) and D = O(B lgN) D B when D ...
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