We give upper and lower bounds on the power of subsystems of the Ideal Proof System (IPS), the algebraic proof system recently proposed by Grochow and Pitassi [GP14], where the circuits comprising the proof come from various restricted algebraic circuit classes. This mimics an established research direction in the boolean setting for subsystems of Extended Frege proofs, where proof-lines are ci...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

The paper is devoted to the quantum implementation of the decoding of the (classical) simplex code of length n. The implementation attempts at trading off time complexity with circuit complexity of decoding. We suggest a quantum decoding algorithm that operates on a circuit of size O(log n) and has time complexity O(log n). It also requires an additional circuit of size O(n) needed to gain bitw...

The problem of constructing hazard-free Boolean circuits dates back to the 1940s and is an important problem in circuit design. Our main lower-bound result unconditionally shows the existence of functions whose circuit complexity is polynomially bounded while every hazardfree implementation is provably of exponential size. Previous lower bounds on the hazard-free complexity were only valid for ...

Complexity of design and testing are the major obstacle for widespread use of asynchronous circuit in digital circuit design. Template based synthesis of asynchronous circuit is accepted as an effective way to decrease complexity of design of asynchronous circuit. One of the popular pre-designed templates that most synthesis tools use it to synthesis QDI asynchronous circuit is Pre-Charged Full...

A circuit complexity of a graph is the minimum number of union and intersection operations needed to obtain the whole set of its edges starting from stars. Our main motivation to study this measure of graphs is that it is related to the circuit complexity of boolean functions. We prove some lower bounds to the circuit complexity of explicitly given graphs. In particular, we use the graph theore...

When binary decision diagrams are formed from uniformly distributed Monte Carlo data for a large number of variables, the complexity of the decision diagrams exhibits a predictable relationship to the number of variables and minterms. In the present work, a neural network model has been used to analyze the pattern of shortest path length for larger number of Monte Carlo data points. The neural ...