This paper describes a doubly balanced Gilbert Cell mixer designed in BJT and CMOS technology to operate within 0 to 5 V. A 100 mv input signal was applied at both RF and LO port at different frequencies and their simulation curves were studied for a multiplier. The design done in BJT was taped out for fabrication and the chip on its return from foundry, was tested for its results. A comparison...

The design of CMOS based low pass filter for analog-to-digital, digital-to-analog and audio applications is described in this paper. Active load resistor and floating inductor is used for the implementation of low pass filter. CMOS technology has become dominant over bipolar technology for analog circuits design in mixed signal system. The differential floating active inductor is designed with ...

*1: CDS: Correlated double sampling CMOS sensors are now widely used in cellular phones and other mobile devices, and as a result, sales of these devices have been increasing rapidly. Furthermore, demand for CMOS sensors has been increasing in fields that require high-speed imaging functions, such as digital singlelens reflex cameras. While CMOS sensor advantages over CCD include lower power co...

Abstract  In his paper a new current-controlled conveyor (CCCII) in CMOS technology is presented. It features, low supply voltage (±0.7), low power consumption, low circuit complexity, rail to rail operation and wide range parasitic resistance ( ). The circuit has been successfully employed in a multifunction biquad filter. Simulation results by HSPICE show high performance of the circuit and c...

The silicon-on-insulator (SOI) CMOS technology has a number of advantages over the standard bulk CMOS technology, such as no latch-up effect, high speed and low power. The fully depleted SOI (FD-SOI) technology provided by OKI Electric Industry Co., Ltd. is realizing the full features of the advantages with lowest junction capacitance. Test element group (TEG) structures of transistors were fab...

CMEMS ® technology is an innovative CMOS+MEMS manufacturing process developed by Silicon Labs, a leading supplier of timing solutions. The term CMEMS is a contraction of the acronyms CMOS and MEMS (microelectromechanical systems). CMEMS technology offers many benefits over traditional oscillator approaches, ranging from scalability, customer-specific programmability and instantaneous samples at...

CMOS technology has achieved the device dimension in the nanometer range. Beyond this CMOS technology is the QCA (Quantum-dot Cellular Automata). Due to nanoscale defects may occur in this technology so in the consequences of it the faults will occur. This paper presents the defect analysis of QCA basic devices like Majority Voter (MV), inverter. The defect analysis and its effects on the outpu...

An additional stage for a Low Voltage Lazzaro’s Winner Take All (WTA) circuit is introduced. It allows lowering the voltage supply requirements so that it can be functional in fine line CMOS technology. Electrical measurements of a prototype in CMOS 0.5μm technology verify the operation of the WTA circuit with VDD = 1.5V. Simulations in PSpice and stability issues are presented as well.

The present work consists of designing a Single Balanced Mixer (SBM) with the 65 nm CMOS technology, this for a 1.9 GHz RF channel, dedicated to wireless applications. This paper shows; the polarization chosen for this structure, models of evaluating parameters of the mixer, then simulation of the circuit in 65nm CMOS technology and comparison with previously treated.