Research prototypes of networked systems are often evaluated on overlay testbeds and emulation testbeds. Most of the strengths and weaknesses of these two types of testbeds are complementary. We outline the motivation, design, implementation, and sample results of an environment that seeks to provides the best of each type. Flexlab couples an emulation testbed with arbitrary network models. We ...

Pseudo Wire Emulation Edge-to-Edge (PWE3) Architecture Status of This Memo This memo provides information for the Internet community. It does not specify an Internet standard of any kind. Distribution of this memo is unlimited. Abstract This document describes an architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It discusses the emulation of services such as Frame Relay, ATM, Ethernet...

The network simulator ns-2 implements both wireless networks and emulation – a feature that allows to simulate a network environment among real stations. In contrast to a discrete event simulation an emulation is affected by various system parameters. The understanding of the impact of those parameters is crucial to obtain valid results from an emulation experiment. In this paper we evaluate a ...

High dimensional data suffer from unwanted variation, such as the batch effects common in microarray data. Unwanted variation complicates the analysis of high dimensional data, leading to high rates of false discoveries, high rates of missed discoveries, or both. In many cases the factors causing the unwanted variation are unknown and must be inferred from the data. In such cases, negative cont...

. . . . . . . . . . i Acknowledgments . . . . . . . . iii

Speeding up logic simulation is important to reduce design time of complex systems. Hardware emulation through reconfigurable systems(RS) build using FPGA's offer an cheap and efficient method to achieve the required speed-up. Emulation through RS poses some unique problems because of the limited circuit and I/O resources. A preparatory step for emulation using RS is to partition the circuit in...

This paper presents details on the design and implementation of a scalable framework for evaluating peerto-peer protocols. Unlike systems based on simulation, emulation-based systems enable the experimenter to obtain data that reflects directly on the concrete implementation in much greater detail. This paper argues that emulation is a better model for experiments with peer-topeer protocols sin...

After four years of research within the PLANETS project and two years of KEEP the jigsaw puzzle of emulation becomes a more complete picture. Emulation strategies are now seen as a viable complement to migration. A conceptual and theoretical groundwork has already been laid out, e.g. proper definition and selection of suitable emulators. However, integration into preservation frameworks and add...

Current paper presents an approach to emulate fault simulation of sequential circuits on FPGA. Fault simulation is an important subtask in test pattern generation and it is frequently used throughout the test generation process. In the paper, we explain the problems associated to fault emulation for sequential circuits. Two alternative approaches are described, which can be considered as trade-...

—Network emulation using real sensor node hardware is used to increase the accuracy of pure network simulations. Coupling OMNeT++ with network emulation platforms and tools introduces new application possibilities for both sides. This work-in-progress report covers our experiences of using OMNeT++ as a test driver for RoSeNet, a network emulation and test platform for low-power wireless technol...