One of major implementations of Linear Threshold Gate (LTG) is via resonant tunneling diodes (RTD). The functionality of this threshold logic gate greatly depends on the parameters of the RTD and parametric faults impact its functionality. A suitable fault model for Combinational Threshold Logic gates is presented. A methodology is also developed to generate test patterns that detect these para...

Physarum polycephalum is a macroscopic single celled plasmodial slime mould. We employ plasmodial phototactic responses to construct laboratory prototypes of NOT and NAND logical gates with electrical inputs/outputs and optical coupling; the slime mould plays dual roles of computing device and electrical conductor. Slime mould logical gates are fault tolerant and resettable. The results present...

Advanced Encryption Standard (AES) is the symmetric key standard for encryption and decryption. In this work, a 128-bit AES encryption and decryption using Rijndael Algorithm is designed and synthesized using verilog code. The fault detection scheme for their hardware implementation plays an important role in making the AES robust to the internal and malicious faults. In the proposed AES, a com...

Fault-tolerant logical operations for qubits encoded by CSS codes are discussed, with emphasis on methods which apply to codes of high rate, encoding k qubits per block with k > 1. It is shown that the logical qubits within a given block can be prepared by a single recovery operation in any state whose stabilizer generator separates into X and Z parts. Optimized methods to move logical qubits a...

or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit implements only the functions having one-to-one mapping between its input and output vectors and therefore naturally takes care of heating. Reversible logic design becomes one of the pro...