نتایج جستجو برای: gate array
تعداد نتایج: 163128 فیلتر نتایج به سال:
This paper describes the framework of internal hardware templates. These reusable templates can be instantiated, inside the FPGA, to the required precision. Thus, the resource utilization of the target RCMs can be improved. Moreover, the configuration time can be eliminated after the first use of the template. The detail design is presented.
Inhaltsverzeichnis Einleitung 1
We examine the problem of routing wires of a VLSI chip, where the pins to be connected are arranged in a regular rectangular array. We obtain tight bounds for the worst-case "channel-width" needed to route an n x n array, and develop provably good heuristics for the general case. Single-turn routings are proved to be near-optimal in the worst-case. A central result of our paper is a "rounding a...
In this paper, a description of a general purpose neural network chip with on-chip learning is given. The design is implemented using Xilinx Vertex II XCV 1000 Field Programmable Gate Array (FPGA). An XOR gate simulation was used as a testing application. Results and comparison of both software and hardware implementations are listed. A second testing application in noise cancellation and voice...
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