We propose a high-level hardware description environment which aims at reducing the gap between application design and the well-established hardware description frameworks. Our motivations rise from an explicit demand for design representation languages at a higher abstraction level with respect to the ones currently adopted by hardware system engineering. A candidate solution can be identified...

This paper describes a novel modeling methodology for electrothermal effects in large mixed-signal circuits. It is accomplished by developing analog event-driven electrothermal and thermal models in an analog hardware description language (AHDL). The large-scale mixedsignal circuits represented by the analog event-driven models can be analyzed more efficiently than using standard analog models.

Hardware/Software systems nd an ever increasing market. The modeling, partitioning, (co-)simulation and synthesis of such systems requires a uniform language of description for hardware and software on all levels of design. This article presents such a language in form of Java. The article concentrates on the qualiication for modeling and simulation of this language with respect to hardware. It...

A thorough description of the evolving MIMIC Hardware Description Language (MHDL) is presented from the perspective of an analog modeler or designer. Analog simulation issues pertinent to MHDL description are discussed. This includes both transient and steady-state simulation.perspectives. Several modeling examples demonstrate the concepts and simulation issues related to these examples, as wel...

Implementing an algorithm to hardware platforms is generally not an easy task. The algorithm, typically described in a high-level specification language, must be translated to a low-level HDL language. The difference between models of computation (sequential versus fine-grained parallel) limits the efficiency of automatic translation. On the other hand, manual implementation is time-consuming, ...

This paper describes hardware/software codesign method of the extendible embedded RISC core VIRGO, which based on MIPS-I instruction set architecture. VIRGO is described by Verilog hardware description language that has five-stage pipeline with shared 32-bit cache/memory interface, and it is controlled by distributed control scheme. Every pipeline stage has one small controller, which controls ...

Application Specific Instruction Processors (ASIPs) provide enhanced performance by directly implementing application segments in hardware as custom instructions. Recent work [1, 2] automates generation of custom instructions from application source code. Speedups of up to 6 times [3] are attainable for certain benchmarks. However, instructions generated from C are often restricted to small clu...

Hardware description languages and tools require a considerable amount of teaching activities in digital systems design course, which is difficult to accommodate limited time frame, use for e-learning. This paper presents our user-friendly open-source web-based tool, SHDL, used describe simulate hardware components translate them into standard language. SHDL language tool design, aims improve t...