<p><span lang="EN-US">This work offers a graphics processing unit (GPU)-based system for real-time face recognition, which can detect and identify faces with high accuracy. This created implemented novel parallel strategies image integral, computation scan window processing, classifier amplification correction as part of the identification phase Viola-Jones cascade classifier. Also,...

Compared with traditional video streaming server, streaming on multi-core platform has many advantages: flexible and configurable on the number of executing core according to system requirements; fault-tolerant; and fitting well to future process technologies, more cores will be available in advanced process technologies, meanwhile the complexity per core does not increase. In this paper, we fo...

We present the i-Core (Invasive Core), an Application Specific Instruction Set Processor (ASIP) with a run-time adaptive instruction set. Its adaptivity is controlled by the runtime system with respect to application properties that may vary during run-time. A reconfigurable fabric hosts the adaptive part of the instruction set whereas the rest of the instruction set is fixed. We show how the i...

This article presents a new approach for system-level reliability management technique for multi-core microprocessors. In the new approach, the electromigration (EM) induced mean time to failure (MTTF) at the system level is modeled as a resource, which is abstracted from a more physics-based EM model. Based on such resource-based EM models, we propose a novel task migration method to explicitl...

For general purpose multi-core computing, memory design especially cache implementation is one of the important issues. Program execution is often limited by the memory bottleneck, not processor availability and speed. Multi-core processors can exacerbate the problem unless care is taken to conserve memory bandwidth and avoid memory contention. Also, the absence of explicit commands to move dat...

The embedded software industry wants microprocessors with increased computing functionality that maintains or reduces space, weight, and power (SWaP). Single core processors were the key embedded industry solution between 1980 and 2000 when large performance increases were being achieved on a yearly basis and were fulfilling the prophecy of Moore’s Law. Moore’s Law states that “the number of tr...

9