This paper demonstrates an on-chip di/dt detector circuit. The di/dt detector circuit consists of a power supply line, an underlying spiral inductor and an amplifier. The mutual inductor induces a di/dt proportional voltage, and the amplifier amplifies and outputs the value. The measurement results show that the di/dt detector output and the voltage difference between a resistor have good agree...

the star-mesh transformation allows the reduction of nodes in an electrical circuit. the gauss elimination method allows the reduction of unknowns in a system of linear equations . triangular decomposition can be used to find the inverse of a matrix. in this paper the coherence between these methods are discussed. it is shown that the gauss elimination method gives the same formula for star-mes...

This paper presents a new realization of synthetic transformer using off the shelf active blocks. proposed is designed operational transconductance amplifier (OTA), voltage differencing current conveyor (VDCC), resistor and capacitor. Use VDCC helps to utilizes benefits both unit conveyor. The working circuit verified through simulations in LTSPICE TSMC 180nm process characteristics. offers fea...

The design and optimization of coils for Inductive Power Transfer (IPT) systems is an iterative process conducted in Finite Element (FE) tools that takes a lot time computational resources. In order to overcome such limitations the process, new empirical equations evaluation self-inductance mutual inductance values are proposed this work. By means multi-objective genetic programming algorithm, ...

This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the undesirable effects of on-chip inductance are higher interconnect coupling noise and substrate coupling, challenges for accurate extraction, the required modifications of the infrastructure of CAD tools, and the inevitably slowe...

We describe a calculation tool and modeling methods to find self and mutual inductance and current distribution in superconductive multilayer circuit layouts. Accuracy of the numerical solver is discussed and compared with experimental measurements. Effects of modeling parameter selection on calculation results are shown, and we make conclusions on the selection of modeling parameters for fast ...

In this Thesis, we study three problems related to the modeling of interconnects in Integrated Circuits. The common denominator among them is the use of physical arguments in order to produce efficient models that simplify the mathematical complexity of each problem. The first problem deals with a fast and accurate calculation of mutual inductance. We adopt a loop inductance formalism, wherein ...