This paper describes the optical circuit that enables to extract address from a transmitted cell in an all-optical manner. Nonlinear optical loop mirrors (NOLM’s) are used as all-optical switches in order to confirm the operation of the proposed circuit. The control pulses synchronized with address bits are generated from the transmitted cell. The address bits are successfully extracted without...

-In this paper a 4 bit parallel adder/subtractor circuit has been designed and analyzed. The circuit uses a controlled adder/subtractor circuit which converts the negative numbers into their 2’s complement. A comparative study of the silicon area and the power consumption has been done in the circuit using different channel lengths such as 65nm, 45nm. The circuit is designed and simulated using...

In this paper, we propose an efficient design of a reversible single precision floating point multiplier based on compressor. The single precision floating point multiplier requires the design of an efficient 24x24 bit integer multiplier. In the proposed architecture, the 24x24 bit multiplication operation is fragmented to nine parallel reversible 8x8 bit multiplication modules. In this paper, ...