In a within-subject design we investigated the levels-of-processing (LOP) effect using visual material in a behavioral and a corresponding PET study. In the behavioral study we characterize a generalized LOP effect, using pleasantness and graphical quality judgments in the encoding situation, with two types of visual material, figurative and nonfigurative line drawings. In the PET study we inve...

—PLX is a compact, fully subword-parallel instruction set architecture (ISA) for very fast multimedia processing. This paper adds floating-point instructions to PLX for 3D graphics processing, which is essential for applications such as games and digital content creation. Based on an analysis of the 3D graphics pipeline from an ISA point of view, we show the operations and data types needed. We...

The trend in programmable architectures for digital signal processing (DSP) is to move towards high-level language programming, which sets high requirements for compilers to efficiently exploit the instruction level parallelism in modern processors. In this paper, efficiency of transport triggered architectures (TTA) in DSP applications is discussed. The efficiency of a high-level compiler on a...

However, for the parallelization of tasks not necessarily a multi-core processor is required. Hardware multithreading, for example, is an approach that enables parallelization also for single-core processors. Here, we deal with a basic problem of cores with pipeline architecture: cache misses or data dependencies between the instructions mean that the pipelined instruction processing has to be ...

PLX is a small, fully subword-parallel instruction set architecture designed for very fast multimedia processing, especially in constrained environments requiring low cost and power such as handheld multimedia information appliances. In PLX, we select the most useful multimedia instructions added previously to microprocessors. We also introduce a few novel features: a new definition of predicat...

A power consumption measurement framework for embedded processing systems is presented in this work. Given an assembly or machine level program as input to this setup, the energy consumption of the specific program in the specific processing systems may be estimated. The instruction level power models are derived based on the power supply current measurement technique. The instantaneous variati...